x86/cpufeatures: Add X86_FEATURE_X2AVIC_EXT
Add CPUID feature bit for x2AVIC extension that enables AMD SVM to support up to 4096 vCPUs in x2AVIC mode. The primary change is in the size of the AVIC Physical ID table, which can now go up to 8 contiguous 4k pages. The number of pages allocated is controlled by the maximum APIC ID for a guest, and that controls the number of pages to allocate for the AVIC Physical ID table. AVIC hardware is enhanced to look up Physical ID table entries for vCPUs > 512 for locating the target APIC backing page and the host APIC ID of the physical core on which the guest vCPU is running. Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org> Acked-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/e5c9c471ab99a130bf9b728b77050ab308cf8624.1757009416.git.naveen@kernel.org Signed-off-by: Sean Christopherson <seanjc@google.com>
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Sean Christopherson
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5d0316e25d
@@ -500,6 +500,7 @@
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#define X86_FEATURE_IBPB_EXIT_TO_USER (21*32+14) /* Use IBPB on exit-to-userspace, see VMSCAPE bug */
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#define X86_FEATURE_ABMC (21*32+15) /* Assignable Bandwidth Monitoring Counters */
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#define X86_FEATURE_MSR_IMM (21*32+16) /* MSR immediate form instructions */
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#define X86_FEATURE_X2AVIC_EXT (21*32+17) /* AMD SVM x2AVIC support for 4k vCPUs */
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/*
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* BUG word(s)
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@@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = {
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{ X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
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{ X86_FEATURE_AMD_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 },
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{ X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 },
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{ X86_FEATURE_X2AVIC_EXT, CPUID_ECX, 6, 0x8000000a, 0 },
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{ X86_FEATURE_COHERENCY_SFW_NO, CPUID_EBX, 31, 0x8000001f, 0 },
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{ X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 },
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{ X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 },
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