Pull clk updates from Stephen Boyd:
"There's a bunch of patches here across drivers/clk/ to migrate drivers
to use struct clk_ops::determine_rate() instead of the round_rate()
one so that we can remove the round_rate clk_op entirely. Brian has
taken up that task which nobody else has wanted to do for close to a
decade. Thanks Brian!
This is all prerequisite work to get to the real task of improving the
clk rate setting process. Once we have determine_rate() used
everywhere, we'll be able to do things like chain the rate request
structs in linked lists to order the rate setting operations or add
more parameters without having to change every clk driver in
existence. It's also nice to not have multiple ways to do something
which just causes confusion for clk driver authors. Overall I'm glad
this is getting done.
Beyond this change we also have a tweak to the clk_lookup() function
in the core framework to use hashing on the clk name instead of a clk
tree walk with string comparisons. We _still_ rely on the clk name to
be unique, because historically we've used globally unique strings to
describe the clk tree topology. This tree walk becomes increasingly
slow as more clks are added to the system. Searching from the roots
for a duplicate is simple but pretty dumb and it wastes boot time so
we're using a hash table as an improvement. Ideally we wouldn't rely
on the strings to be unique at all, relegating them to simply debug
information, but that is future work that will likely require some
sort of Kconfig knob indicating strings aren't used for topology
description.
Outside of the core framework changes we have the usual new SoC
support and fixes to clk drivers for things that were discovered once
the clks were used by consumer drivers. Nothing in particular is
jumping out at me in the "misc" pile, except maybe the Amlogic driver
that has gone through a refactoring. That series got a fix from
testing in -next though so it seems likely that things have been
getting good test coverage for a couple weeks already"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (299 commits)
clk: microchip: core: remove duplicate roclk_determine_rate()
reset: aspeed: register AST2700 reset auxiliary bus device
dt-bindings: clock: ast2700: modify soc0/1 clock define
clk: tegra: do not overallocate memory for bpmp clocks
clk: ep93xx: Use int type to store negative error codes
clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver
clk: loongson2: Add clock definitions for Loongson-2K0300 SoC
clk: loongson2: Avoid hardcoding firmware name of the reference clock
clk: loongson2: Allow zero divisors for dividers
clk: loongson2: Support scale clocks with an alternative mode
clk: loongson2: Allow specifying clock flags for gate clock
dt-bindings: clock: loongson2: Add Loongson-2K0300 compatible
clk: clocking-wizard: Fix output clock register offset for Versal platforms
clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver()
clk: mmp: pxa1908: Instantiate power driver through auxiliary bus
clk: s2mps11: add support for S2MPG10 PMIC clock
dt-bindings: clock: samsung,s2mps11: add s2mpg10
dt-bindings: stm32: cosmetic fixes for STM32MP25 clock and reset bindings
clk: stm32: introduce clocks for STM32MP21 platform
dt-bindings: stm32: add STM32MP21 clocks and reset bindings
...
- Speed up clk_core_lookup() by using a hashtable
* clk-microchip:
ARM: at91: remove default values for PMC_PLL_ACR
clk: at91: add ACR in all PLL settings
clk: at91: sam9x7: Add peripheral clock id for pmecc
clk: at91: clk-master: Add check for divide by 3
clk: at91: clk-sam9x60-pll: force write to PLL_UPDT register
ARM: at91: pm: save and restore ACR during PLL disable/enable
* clk-lookup:
clk: Use hashtable for global clk lookups
clk: Sort include statements
* clk-st:
dt-bindings: stm32: cosmetic fixes for STM32MP25 clock and reset bindings
clk: stm32: introduce clocks for STM32MP21 platform
dt-bindings: stm32: add STM32MP21 clocks and reset bindings
Pull Char/Misc/IIO/Binder updates from Greg KH:
"Here is the big set of char/misc/iio and other driver subsystem
changes for 6.18-rc1.
Loads of different stuff in here, it was a busy development cycle in
lots of different subsystems, with over 27k new lines added to the
tree.
Included in here are:
- IIO updates including new drivers, reworking of existing apis, and
other goodness in the sensor subsystems
- MEI driver updates and additions
- NVMEM driver updates
- slimbus removal for an unused driver and some other minor updates
- coresight driver updates and additions
- MHI driver updates
- comedi driver updates and fixes
- extcon driver updates
- interconnect driver additions
- eeprom driver updates and fixes
- minor UIO driver updates
- tiny W1 driver updates
But the majority of new code is in the rust bindings and additions,
which includes:
- misc driver rust binding updates for read/write support, we can now
write "normal" misc drivers in rust fully, and the sample driver
shows how this can be done.
- Initial framework for USB driver rust bindings, which are disabled
for now in the build, due to limited support, but coming in through
this tree due to dependencies on other rust binding changes that
were in here. I'll be enabling these back on in the build in the
usb.git tree after -rc1 is out so that developers can continue to
work on these in linux-next over the next development cycle.
- Android Binder driver implemented in Rust.
This is the big one, and was driving a huge majority of the rust
binding work over the past years. Right now there are two binder
drivers in the kernel, selected only at build time as to which one
to use as binder wants to be included in the system at boot time.
The binder C maintainers all agreed on this, as eventually, they
want the C code to be removed from the tree, but it will take a few
releases to get there while both are maintained to ensure that the
rust implementation is fully stable and compliant with the existing
userspace apis.
All of these have been in linux-next for a while"
* tag 'char-misc-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (320 commits)
rust: usb: keep usb::Device private for now
rust: usb: don't retain device context for the interface parent
USB: disable rust bindings from the build for now
samples: rust: add a USB driver sample
rust: usb: add basic USB abstractions
coresight: Add label sysfs node support
dt-bindings: arm: Add label in the coresight components
coresight: tnoc: add new AMBA ID to support Trace Noc V2
coresight: Fix incorrect handling for return value of devm_kzalloc
coresight: tpda: fix the logic to setup the element size
coresight: trbe: Return NULL pointer for allocation failures
coresight: Refactor runtime PM
coresight: Make clock sequence consistent
coresight: Refactor driver data allocation
coresight: Consolidate clock enabling
coresight: Avoid enable programming clock duplicately
coresight: Appropriately disable trace bus clocks
coresight: Appropriately disable programming clocks
coresight: etm4x: Support atclk
coresight: catu: Support atclk
...
Pull SoC build fix from Arnd Bergmann:
"One commit for the dt bindings was missing from the dt branch, this
one is already pending in the clk tree that contains the corresponding
device driver"
* tag 'soc-fixes-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
dt-bindings: clock: Add ARTPEC-8 clock controller
Pull networking updates from Paolo Abeni:
"Core & protocols:
- Improve drop account scalability on NUMA hosts for RAW and UDP
sockets and the backlog, almost doubling the Pps capacity under DoS
- Optimize the UDP RX performance under stress, reducing contention,
revisiting the binary layout of the involved data structs and
implementing NUMA-aware locking. This improves UDP RX performance
by an additional 50%, even more under extreme conditions
- Add support for PSP encryption of TCP connections; this mechanism
has some similarities with IPsec and TLS, but offers superior HW
offloads capabilities
- Ongoing work to support Accurate ECN for TCP. AccECN allows more
than one congestion notification signal per RTT and is a building
block for Low Latency, Low Loss, and Scalable Throughput (L4S)
- Reorganize the TCP socket binary layout for data locality, reducing
the number of touched cachelines in the fastpath
- Refactor skb deferral free to better scale on large multi-NUMA
hosts, this improves TCP and UDP RX performances significantly on
such HW
- Increase the default socket memory buffer limits from 256K to 4M to
better fit modern link speeds
- Improve handling of setups with a large number of nexthop, making
dump operating scaling linearly and avoiding unneeded
synchronize_rcu() on delete
- Improve bridge handling of VLAN FDB, storing a single entry per
bridge instead of one entry per port; this makes the dump order of
magnitude faster on large switches
- Restore IP ID correctly for encapsulated packets at GSO
segmentation time, allowing GRO to merge packets in more scenarios
- Improve netfilter matching performance on large sets
- Improve MPTCP receive path performance by leveraging recently
introduced core infrastructure (skb deferral free) and adopting
recent TCP autotuning changes
- Allow bridges to redirect to a backup port when the bridge port is
administratively down
- Introduce MPTCP 'laminar' endpoint that con be used only once per
connection and simplify common MPTCP setups
- Add RCU safety to dst->dev, closing a lot of possible races
- A significant crypto library API for SCTP, MPTCP and IPv6 SR,
reducing code duplication
- Supports pulling data from an skb frag into the linear area of an
XDP buffer
Things we sprinkled into general kernel code:
- Generate netlink documentation from YAML using an integrated YAML
parser
Driver API:
- Support using IPv6 Flow Label in Rx hash computation and RSS queue
selection
- Introduce API for fetching the DMA device for a given queue,
allowing TCP zerocopy RX on more H/W setups
- Make XDP helpers compatible with unreadable memory, allowing more
easily building DevMem-enabled drivers with a unified XDP/skbs
datapath
- Add a new dedicated ethtool callback enabling drivers to provide
the number of RX rings directly, improving efficiency and clarity
in RX ring queries and RSS configuration
- Introduce a burst period for the health reporter, allowing better
handling of multiple errors due to the same root cause
- Support for DPLL phase offset exponential moving average,
controlling the average smoothing factor
Device drivers:
- Add a new Huawei driver for 3rd gen NIC (hinic3)
- Add a new SpacemiT driver for K1 ethernet MAC
- Add a generic abstraction for shared memory communication
devices (dibps)
- Ethernet high-speed NICs:
- nVidia/Mellanox:
- Use multiple per-queue doorbell, to avoid MMIO contention
issues
- support adjacent functions, allowing them to delegate their
SR-IOV VFs to sibling PFs
- support RSS for IPSec offload
- support exposing raw cycle counters in PTP and mlx5
- support for disabling host PFs.
- Intel (100G, ice, idpf):
- ice: support for SRIOV VFs over an Active-Active link
aggregate
- ice: support for firmware logging via debugfs
- ice: support for Earliest TxTime First (ETF) hardware offload
- idpf: support basic XDP functionalities and XSk
- Broadcom (bnxt):
- support Hyper-V VF ID
- dynamic SRIOV resource allocations for RoCE
- Meta (fbnic):
- support queue API, zero-copy Rx and Tx
- support basic XDP functionalities
- devlink health support for FW crashes and OTP mem corruptions
- expand hardware stats coverage to FEC, PHY, and Pause
- Wangxun:
- support ethtool coalesce options
- support for multiple RSS contexts
- Ethernet virtual:
- Macsec:
- replace custom netlink attribute checks with policy-level
checks
- Bonding:
- support aggregator selection based on port priority
- Microsoft vNIC:
- use page pool fragments for RX buffers instead of full pages
to improve memory efficiency
- Ethernet NICs consumer, and embedded:
- Qualcomm: support Ethernet function for IPQ9574 SoC
- Airoha: implement wlan offloading via NPU
- Freescale
- enetc: add NETC timer PTP driver and add PTP support
- fec: enable the Jumbo frame support for i.MX8QM
- Renesas (R-Car S4):
- support HW offloading for layer 2 switching
- support for RZ/{T2H, N2H} SoCs
- Cadence (macb): support TAPRIO traffic scheduling
- TI:
- support for Gigabit ICSS ethernet SoC (icssm-prueth)
- Synopsys (stmmac): a lot of cleanups
- Ethernet PHYs:
- Support 10g-qxgmi phy-mode for AQR412C, Felix DSA and Lynx PCS
driver
- Support bcm63268 GPHY power control
- Support for Micrel lan8842 PHY and PTP
- Support for Aquantia AQR412 and AQR115
- CAN:
- a large CAN-XL preparation work
- reorganize raw_sock and uniqframe struct to minimize memory
usage
- rcar_canfd: update the CAN-FD handling
- WiFi:
- extended Neighbor Awareness Networking (NAN) support
- S1G channel representation cleanup
- improve S1G support
- WiFi drivers:
- Intel (iwlwifi):
- major refactor and cleanup
- Broadcom (brcm80211):
- support for AP isolation
- RealTek (rtw88/89) rtw88/89:
- preparation work for RTL8922DE support
- MediaTek (mt76):
- HW restart improvements
- MLO support
- Qualcomm/Atheros (ath10k):
- GTK rekey fixes
- Bluetooth drivers:
- btusb: support for several new IDs for MT7925
- btintel: support for BlazarIW core
- btintel_pcie: support for _suspend() / _resume()
- btintel_pcie: support for Scorpious, Panther Lake-H484 IDs"
* tag 'net-next-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1536 commits)
net: stmmac: Add support for Allwinner A523 GMAC200
dt-bindings: net: sun8i-emac: Add A523 GMAC200 compatible
Revert "Documentation: net: add flow control guide and document ethtool API"
octeontx2-pf: fix bitmap leak
octeontx2-vf: fix bitmap leak
net/mlx5e: Use extack in set rxfh callback
net/mlx5e: Introduce mlx5e_rss_params for RSS configuration
net/mlx5e: Introduce mlx5e_rss_init_params
net/mlx5e: Remove unused mdev param from RSS indir init
net/mlx5: Improve QoS error messages with actual depth values
net/mlx5e: Prevent entering switchdev mode with inconsistent netns
net/mlx5: HWS, Generalize complex matchers
net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
selftests/net: add tcp_port_share to .gitignore
Revert "net/mlx5e: Update and set Xon/Xoff upon MTU set"
net: add NUMA awareness to skb_attempt_defer_free()
net: use llist for sd->defer_list
net: make softnet_data.defer_count an atomic
selftests: drv-net: psp: add tests for destroying devices
selftests: drv-net: psp: add test for auto-adjusting TCP MSS
...
Pull media updates from Mauro Carvalho Chehab:
- Added a new V4L2 clock helper
- New camera sensor drivers
- iris: Enable H.264/H.265 encoder support and fixes in iris driver
common code
- camss: add support for new SoC flavors
- venus: add new SoC support
- tc358743: support more infoframe types
- Various fixes, driver improvements and cleanups
* tag 'media/v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (439 commits)
media: venus: pm_helpers: add fallback for the opp-table
media: qcom: camss: vfe: Fix BPL alignment for QCM2290
media: tuner: xc5000: Fix use-after-free in xc5000_release
media: i2c: tc358743: Fix use-after-free bugs caused by orphan timer in probe
media: b2c2: Fix use-after-free causing by irq_check_work in flexcop_pci_remove
media: vsp1: Export missing vsp1_isp_free_buffer symbol
media: renesas: vsp1: Convert to SYSTEM_SLEEP/RUNTIME_PM_OPS()
media: renesas: ceu: Convert to RUNTIME_PM_OPS()
media: renesas: fdp1: Convert to RUNTIME_PM_OPS()
media: renesas: rcar-vin: Convert to DEFINE_SIMPLE_DEV_PM_OPS()
media: renesas: rcar_drif: Convert to DEFINE_SIMPLE_DEV_PM_OPS()
media: uvcvideo: Mark invalid entities with id UVC_INVALID_ENTITY_ID
media: uvcvideo: Support UVC_CROSXU_CONTROL_IQ_PROFILE
media: uvcvideo: Run uvc_ctrl_init_ctrl for all controls
media: uvcvideo: Shorten the transfer size non compliance message
media: uvcvideo: Do not re-reference dev->udev
media: uvcvideo: Use intf instead of udev for printks
media: uvcvideo: Move video_device under video_queue
media: uvcvideo: Drop stream->mutex
media: uvcvideo: Move MSXU_CONTROL_METADATA definition to header
...
Pull SoC driver updates from Arnd Bergmann:
"Lots of platform specific updates for Qualcomm SoCs, including a new
TEE subsystem driver for the Qualcomm QTEE firmware interface.
Added support for the Apple A11 SoC in drivers that are shared with
the M1/M2 series, among more updates for those.
Smaller platform specific driver updates for Renesas, ASpeed,
Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale
SoCs.
Driver updates in the cache controller, memory controller and reset
controller subsystems.
SCMI firmware updates to add more features and improve robustness.
This includes support for having multiple SCMI providers in a single
system.
TEE subsystem support for protected DMA-bufs, allowing hardware to
access memory areas that managed by the kernel but remain inaccessible
from the CPU in EL1/EL0"
* tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits)
soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu()
soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
soc: fsl: qe: Change GPIO driver to a proper platform driver
tee: fix register_shm_helper()
pmdomain: apple: Add "apple,t8103-pmgr-pwrstate"
dt-bindings: spmi: Add Apple A11 and T2 compatible
serial: qcom-geni: Load UART qup Firmware from linux side
spi: geni-qcom: Load spi qup Firmware from linux side
i2c: qcom-geni: Load i2c qup Firmware from linux side
soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem
soc: qcom: geni-se: Cleanup register defines and update copyright
dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus
Documentation: tee: Add Qualcomm TEE driver
tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl
tee: qcom: add primordial object
tee: add Qualcomm TEE driver
tee: increase TEE_MAX_ARG_SIZE to 4096
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF
tee: add close_context to TEE driver operation
...
Pull SoC dt updates from Arnd Bergmann:
"There are five sets of new SoCs that get added in existing families,
all of them being either upgrades or cut-down versions of the older
chips:
- Apple M2 Pro, M2 Max and M2 Ultra, used in the 2022/2023 generation
of high-end workstations and laptops from Apple. Linux has been
working on these for a while but stil requires patches.
- Axis Artpec8 is an Armv8 chip based on Samsung Exynos design,
unlike the earlier Armv7 Artpec6 from the same company that was
part of a separate family of chips.
- NXP i.MX91 is a cut-down version of i.MX93, using only a single
Cortex-A55 core.
- Qualcomm Lemans Auto is a variant of the Lemans SoC that was
originally merged under the sa8775p name, the differences being
mostly the firmware configuration of the platform.
- Four new Renesas SoCs RZ/T2H (r9a09g077m44), RZ/N2H (r9a09g087m44),
RZ/T2H (r9a09g077), and RZ/N2H (r9a09g087) are all industrial
bedded SoCs based on Cortex-A55 cores
In total, there are 65 new machines, including:
- Industrial embedded system and single-board computers based on NXP,
Allwinner, TI, Rockchips, Marvell, Xilinx Spacemit, Starfive chips.
- Reference boards for the newly added Renesas, Qualcomm, NXP and
Axis ARMv8 chips as well as Microchip's MPFS RISC-V SoC
- Laptops and Workstations using Apple M2 and Qualcomm Snapdragon X1
chips.
- Several Samsung phones using Qualcomm Snapdragon chips
- Set-top boxes based on Allwinner H313
- Five BMC boards using 32-bit ASpeed SoCs
- Three network routers using IXP4xx (ARMv5!) and Broadcom bcm4708
(ARMv7) SoCs
Two machines get phased out because they were available only in small
quantities but never made it into products: one STi407 based reference
board, and a Snapdragon 845 based Chromebook.
Aside from the newly added machines, a lot of work went into improving
hardware support on the existing machines and cleaning up contents for
validation"
* tag 'soc-dt-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (931 commits)
arm64: dts: apm-shadowcat: Drop "apm,xgene2-pcie" compatible
arm64: dts: apm-shadowcat: Move slimpro nodes out of "simple-bus" node
ARM: dts: microchip: sam9x7: Add qspi controller
arm64: dts: qcom: Add MST pixel streams for displayport
arm64: dts: qcom: sm6350: correct DP compatibility strings
arm64: dts: qcom: monaco-evk: Enable Adreno 623 GPU
arm64: dts: qcom: qcs8300-ride: Enable Adreno 623 GPU
arm64: dts: qcom: qcs8300: Add gpu and gmu nodes
arm64: dts: allwinner: h313: Add Amediatech X96Q
dt-bindings: arm: sunxi: Add Amediatech X96Q
arm64: dts: apple: t8015: Add SPMI node
arm64: dts: apple: t8012: Add SPMI node
arm64: dts: apple: Add J180d (Mac Pro, M2 Ultra, 2023) device tree
arm64: dts: rockchip: Add devicetree for the ROC-RK3588-RT
dt-bindings: arm: rockchip: Add Firefly ROC-RK3588-RT
arm64: dts: rockchip: update pinctrl names for Radxa E52C
arm64: dts: rockchip: remove vcc_3v3_pmu regulator for Radxa E52C
arm64: dts: apple: Add J474s, J475c and J475d device trees
arm64: dts: apple: Add J414 and J416 Macbook Pro device trees
arm64: dts: apple: Add initial t6020/t6021/t6022 DTs
...
Pull thermal control updates from Rafael Wysocki:
"These are mostly thermal driver updates, including new thermal drivers
for Renesas RZ/G3S and Renesas RZ/G3E SoCs, a new power slider
platform feature support in the Intel int340x thermal driver, a new
Tegra114- specific SOCTHERM driver and more.
There is also a Step-wise thermal governor update allowing it to start
reducing cooling somewhat earlier if the temperature of the given
thermal zone is falling down and a thermal testing code cleanup.
Specifics:
- Add new thermal driver for the Renesas RZ/G3S SoC (Claudiu Beznea)
- Add new thermal driver for the Renesas RZ/G3E SoC (John Madieu)
- Add support for new platform power slider feature to the Intel
int340x driver (Srinivas Pandruvada).
- Add new Tegra114-specific SOCTHERM driver and document Tegra114
SOCTHERM Thermal Management System in DT bindings (Svyatoslav
Ryhel)
- Add temperature sensor channel to thermal-generic-adc (Svyatoslav
Ryhel)
- Add support for per-SoC default trim values to the Renesas
rcar_gen3 thermal driver, use it for adding R-Car V4H default trim
values, fix a comment typo in that driver and document Gen4 support
in its Kconfig entry (Marek Vasut)
- Fix mapping SoCs to generic Gen4 entry in the Renesas rcar_gen3
thermal driver (Wolfram Sang)
- Document the TSU unit in the r9a08g045-tsu and r9a09g047-tsu DT
bindings (Claudiu Beznea, John Madieu)
- Make LMH select QCOM_SCM and add missing IRQ includes to the
qcom/lmh thermal driver (Dmitry Baryshkov)
- Fix incorrect error message in the qcom/lmh thermal driver (Sumeet
Pawnikar)
- Add QCS615 compatible to tsens thermal DT bindings (Gaurav Kohli)
- Document the Glymur temperature sensor in qcom-tsens thermal DT
bindings (Manaf Meethalavalappu Pallikunhi)
- Make k3_j72xx_bandgap thermal driver register the thermal sensor
with hwmon (Michael Walle)
- Tighten GRF requirements in the rockchip thermal DT bindings,
silence a GRF warning in the rockchip thermal driver and unify
struct rockchip_tsadc_chip format in it (Sebastian Reichel)
- Update the Step-wise thermal governor to allow it to reduce the
cooling level earlier if thermal zone temperature is dropping and
clean it up (Rafael Wysocki)
- Clean up the thermal testing code (Rafael Wysocki)
- Assorted cleanups of thermal drivers (Jiapeng Chong, Salah Triki,
Osama Abdelkader)"
* tag 'thermal-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (37 commits)
thermal/drivers/renesas/rzg3e: Fix add thermal driver for the Renesas RZ/G3E SoC
dt-bindings: thermal: qcom-tsens: Document the Glymur temperature Sensor
thermal/drivers/renesas/rzg3e: Add thermal driver for the Renesas RZ/G3E SoC
dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit
thermal/drivers/thermal-generic-adc: Add temperature sensor channel
dt-bindings: thermal: rockchip: Tighten grf requirements
thermal/drivers/rockchip: Shut up GRF warning
thermal/drivers/rockchip: Unify struct rockchip_tsadc_chip format
thermal/drivers/renesas/rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit
thermal/drivers/k3_j72xx_bandgap: Register sensors with hwmon
thermal/drivers/rcar_gen3: Fix mapping SoCs to generic Gen4 entry
thermal/drivers/tegra: Add Tegra114 specific SOCTHERM driver
dt-bindings: thermal: add Tegra114 soctherm header
thermal/drivers/tegra/soctherm-fuse: Prepare calibration for Tegra114 support
dt-bindings: thermal: Document Tegra114 SOCTHERM Thermal Management System
thermal/drivers/rcar_gen3: Document Gen4 support in Kconfig entry
thermal/drivers/rcar_gen3: Fix comment typo
drivers/thermal/qcom/lmh: Fix incorrect error message
thermal/drivers/qcom/lmh: Add missing IRQ includes
...
Pull pin control updates from Linus Walleij:
"We have GPIO awareness in the pin control core and an interesting
AAEON driver.
Core changes:
- Allow pins to be identified/marked as GPIO mode with a special
callback.
The pin controller core is now "aware" if a pin is in GPIO mode if
the callback is implemented in the driver, and can thus be marked
as "strict", i.e. disallowing simultaneous use of a line as GPIO
and another function such as I2C.
This is enabled in the Qualcomm TLMM driver and also implemeted
from day 1 in the new Broadcom STB driver
- Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL
to better describe what the config is doing, as well as making it
more intuitive what shall be returned when reading this property
New drivers:
- Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver
- Qualcomm Glymur family pin controller driver
- Broadcom STB family pin controller driver
- Tegra186 pin controller driver
- AAEON UP pin controller support.
This is some special pin controller that works as an external
advanced line MUX and amplifier for signals from an Intel SoC. A
cooperative effort with the GPIO maintainer was needed to reach a
solution where we reuse code from the GPIO aggregator/forwarder
driver
- Renesas RZ/T2H and RZ/N2H pin controller support
- Axis ARTPEC-8 subdriver for the Samsung pin controller driver
Improvements:
- Output enable (OEN) support in the Renesas RZG2L driver
- Properly support bias pull up/down in the pinctrl-single driver
- Move over all GPIO portions using generic MMIO GPIO to the new
generic GPIO chip management which has a nice and separate API
- Proper DT bindings for some older Broadcom SoCs
- External GPIO (EGPIO) support in the Qualcomm SM8250
Deleted code:
- Dropped the now unused Samsung S3C24xx drivers"
* tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
pinctrl: use more common syntax for compound literals
pinctrl: Simplify printks with pOF format
pinctrl: qcom: Add SDM660 LPASS LPI TLMM
dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl
pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets
pinctrl: qcom: Add glymur pinctrl driver
dt-bindings: pinctrl: qcom: Add Glymur pinctrl
pinctrl: qcom: sm8250: Add egpio support
pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL
pinctrl: keembay: fix double free in keembay_build_functions()
pinctrl: spacemit: fix typo in PRI_TDI pin name
pinctrl: eswin: Fix regulator error check and Kconfig dependency
pinctrl: bcm: Add STB family pin controller driver
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: qcom: make the pinmuxing strict
pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions
pinctrl: qcom: add infrastructure for marking pin functions as GPIOs
pinctrl: allow to mark pin functions as requestable GPIOs
pinctrl: qcom: use generic pin function helpers
pinctrl: make struct pinfunction a pointer in struct function_desc
...
Pull pmdomain updates from Ulf Hansson:
- amlogic: Add support for S6/S7/S7D power-domains controller
- imx: Add support for i.MX91 power-domains
- marvell: Add support for PXA1908 power-domains
- mediatek:
- Add support for modem power sequence
- Add support for RTFF Hardware in MT8196/MT6991
- qcom: Align power-domain definitions for rpmpd
- rockchip: Default to use power-domain support
- thead: Create auxiliary device along with a corresponding reset
driver
- ti: Synchronize on/off state with HW-state for ti-sci power-domains
* tag 'pmdomain-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (25 commits)
pmdomain: thead: Fix error pointer vs NULL bug in th1520_pd_reboot_init()
pmdomain: thead: create auxiliary device for rebooting
driver: reset: th1520-aon: add driver for poweroff/reboot via AON FW
pmdomain: mediatek: airoha: convert from round_rate() to determine_rate()
pmdomain: rockchip: enable ROCKCHIP_PM_DOMAINS with ARCH_ROCKCHIP
pmdomain: marvell: Add PXA1908 power domains
dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu
pmdomain: ti-sci: Set PD on/off state according to the HW state
pmdomain: amlogic: Add support for S6 S7 S7D power domains controller
dt-bindings: power: add Amlogic S6 S7 S7D power domains
pmdomain: mediatek: Convert all SoCs to new style regmap retrieval
pmdomain: mediatek: Add support for RTFF Hardware in MT8196/MT6991
pmdomain: mediatek: Add support for modem power sequences
pmdomain: mediatek: Move ctl sequences out of power_on/off functions
pmdomain: mediatek: Handle SoCs with inverted SRAM power-down bits
pmdomain: mediatek: Refactor bus protection regmaps retrieval
dt-bindings: power: mediatek: Document access-controllers property
pmdomain: remove unneeded 'fast_io' parameter in regmap_config
pmdomain: imx93-blk-ctrl: mask DSI and PXP PD domain register on i.MX91
pmdomain: imx93-blk-ctrl: use ARRAY_SIZE() instead of hardcode number
...
Pull gpio updates from Bartosz Golaszewski:
"There are two new drivers and support for more models in existing
ones.
The generic GPIO API has been reworked and all users converted
which allowed us to move the fields specific to the generic GPIO
implementation out of the high-level struct gpio_chip into its own
structure that wraps the gpio_chip.
Other than that, there's nothing too exciting. Mostly minor tweaks and
fixes all over the place, some refactoring and some small new features
in helper modules.
GPIO core:
- add support for sparse pin ranges to the glue between GPIO and
pinctrl
- use a common prefix across all GPIO descriptor flags for improved
namespacing
New drivers:
- add new GPIO driver for the Nuvoton NCT6694
- add new GPIO driver for MAX7360
Driver improvements:
- add support for Tegra 256 to the gpio-tegra186 driver
- add support for Loongson-2K0300 to the gpio-loongson-64bit driver
- refactor the gpio-aggregator module to expose its GPIO forwarder
API to other in-kernel users (to enable merging of a new pinctrl
driver that uses it)
- convert all remaining drivers to using the modernized generic GPIO
chip API and remove the old interface
- stop displaying global GPIO numbers in debugfs output of controller
drivers
- extend the gpio-regmap helper with a new config option and improve
its support for GPIO interrupts
- remove redundant fast_io parameter from regmap configs in GPIO
drivers that already use MMIO regmaps which imply it
- add support for a new model in gpio-mmio: ixp4xx expansion bus
- order includes alphabetically in a few drivers for better
readability
- use generic device properties where applicable
- use devm_mutex_init() where applicable
- extend build coverage of drivers by enabling more to be compiled
with COMPILE_TEST enabled
- allow building gpio-stmpe as a module
- use dev_err_probe() where it makes sense in drivers
Late driver fixes:
- fix setting GPIO direction to output in gpio-mpfs
Documentation:
- document the usage of software nodes with GPIO chips
Device-tree bindings:
- Add DT bindings documents for new hardware: Tegra256, MAX7360
- Document a new model in Loongson bindings: LS2K0300
- Document a new model using the generic GPIO binding: IXP4xx
- Convert the DT binding for fsl,mxs-pinctrl to YAML
- fix the schema ID in the "trivial" GPIO schema
- describe GPIO hogs in the generic GPIO binding"
* tag 'gpio-updates-for-v6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (122 commits)
gpio: mpfs: fix setting gpio direction to output
gpio: generic: move GPIO_GENERIC_ flags to the correct header
gpio: generic: rename BGPIOF_ flags to GPIO_GENERIC_
gpio: nomadik: fix the debugfs helper stub
MAINTAINERS: Add entry on MAX7360 driver
input: misc: Add support for MAX7360 rotary
input: keyboard: Add support for MAX7360 keypad
gpio: max7360: Add MAX7360 gpio support
gpio: regmap: Allow to provide init_valid_mask callback
gpio: regmap: Allow to allocate regmap-irq device
pwm: max7360: Add MAX7360 PWM support
pinctrl: Add MAX7360 pinctrl driver
mfd: Add max7360 support
dt-bindings: mfd: gpio: Add MAX7360
rtc: Add Nuvoton NCT6694 RTC support
hwmon: Add Nuvoton NCT6694 HWMON support
watchdog: Add Nuvoton NCT6694 WDT support
can: Add Nuvoton NCT6694 CANFD support
i2c: Add Nuvoton NCT6694 I2C support
gpio: Add Nuvoton NCT6694 GPIO support
...
Memory controller drivers for v6.18
1. STM32 OMM: Fix ineffective/missing setting of the req2ack in the
device based on DT property, if the value is different than 0.
2. Samsung Exynos SROM: Fix IO map resource leak if
of_platform_populate() in probe() failed.
3. Broadcom brcmstb: Document existing, older devices in Devicetree
bindings.
4. Tegra 210 EMC: Document OPP table for interconnects (driver usage
will come later) and define memory client IDs as bindings, because
these are shared between DTS and driver.
* tag 'memory-controller-drv-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: tegra210: Use bindings for client ids
dt-bindings: memory: tegra210: Add memory client IDs
dt-bindings: memory: tegra210: emc: Document OPP table and interconnect
dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips
memory: samsung: exynos-srom: Fix of_iomap leak in exynos_srom_probe
memory: stm32_omm: Fix req2ack update test
Link: https://lore.kernel.org/r/20250912140030.204650-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner Device Tree changes for 6.18
This tag contains two DT binding header changes that are shared with
the clk tree.
In this cycle we gained support for the MCU PRCM clock and reset
controller on the A523/A527/T527 family of SoCs, the NPU which is a
Vivante GC9000 IP block, and the NPU clock that was missing. The other
PRCM clock controller gained default bus clock rate settings. These
were not configured in the upstream U-boot bootloader, leading to them
running at slower rates. The assigned rates are from the user manual.
There is also a new board, the NetCube Systems Nagami SoM and two of
its carrier boards.
The A523 family development boards now have their internal RTC clocks
configured correctly, so that the RTC does not drift wildly. The missing
functions for the AXP717 on these boards are added. Missing reset GPIOs
and delays for Ethernet PHYs are added. Last, the Cubie A5E now has its
LEDs described and usable.
An overlay for the Orange Pi Zero interface (addon) board was added.
This can be used with the Orange Pi Zero and Zero Plus 2. Default audio
routing for these two boards (to be used with the addon) were added to
complement the overlay.
* tag 'sunxi-dt-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: sun55i: Complete AXP717A sub-functions
arm64: dts: allwinner: t527: orangepi-4a: hook up external 32k crystal
arm64: dts: allwinner: t527: avaota-a1: hook up external 32k crystal
arm64: dts: allwinner: a527: cubie-a5e: Drop external 32.768 KHz crystal
arm64: dts: sun55i: a523: Assign standard clock rates to PRCM bus clocks
ARM: dts: sunxi: add support for NetCube Systems Nagami Keypad Carrier
ARM: dts: sunxi: add support for NetCube Systems Nagami Basic Carrier
ARM: dts: sunxi: add support for NetCube Systems Nagami SoM
riscv: dts: allwinner: d1s-t113: Add pinctrl's required by NetCube Systems Nagami SoM
dt-bindings: arm: sunxi: Add NetCube Systems Nagami SoM and carrier board bindings
ARM: dts: allwinner: Add Orange Pi Zero Interface Board overlay
ARM: dts: allwinner: orangepi-zero-plus2: Add default audio routing
ARM: dts: allwinner: orangepi-zero: Add default audio routing
arm64: dts: allwinner: a523: Add NPU device node
arm64: dts: allwinner: a523: Add MCU PRCM CCU node
dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller
dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clock
arm64: dts: allwinner: t527: avaota-a1: Add ethernet PHY reset setting
arm64: dts: allwinner: a527: cubie-a5e: Add ethernet PHY reset setting
arm64: dts: allwinner: a527: cubie-a5e: Add LEDs
Link: https://lore.kernel.org/r/aMrtuZg8HlR--TAt@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document the clock controller shipped in Loongson-2K0300 SoC, which
generates various clock signals for SoC peripherals. Differing from
previous generations of SoCs, LS2K0300 requires a 120MHz external clock
input.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Yanteng Si <siyanteng@cqsoftware.com.cn>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Introduce binding documentation for system clocks, functional clocks,
and PEXTP0/1 and UFS reset controllers on MediaTek MT8196.
This binding also includes a handle to the hardware voter, a
fixed-function MCU designed to aggregate votes from the application
processor and other remote processors to manage clocks and power
domains.
The HWV on MT8196/MT6991 is incomplete and requires software to manually
enable power supplies, parent clocks, and FENC, as well as write to both
the HWV MMIO and the controller registers.
Because of these constraints, the HWV cannot be modeled using generic
clock, power domain, or interconnect APIs. Instead, a custom phandle is
exceptionally used to provide direct, syscon-like register access to
drivers.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Co-developed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Laura Nao <laura.nao@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add the missing AFE Merge Interface clock to MT7622 to make use of
it in the audio subsystem.
While at it, also remove the useless CLK_AUDIO_NR_CLK definition.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Previously, the K1 clock driver did not include the parent clocks of
the I2S sysclk.
Introduce pre-clock to fix I2S clock.
Otherwise, the I2S clock may not work as expected.
This patch adds their definitions to allow proper registration
in the driver and usage in the device tree.
Fixes: 1b72c59db0 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add required syscon compatible and #power-domain-cells to the APMU
controller. This is required for the SoC's power domain controller as
the registers are shared.
Device tree bindings for said power domains are also added.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add device tree binding support for RZ/T2H and RZ/N2H SoCs to the
existing RZ/N1 MIIC converter binding. These SoCs share similar MIIC
functionality but have architectural differences that require schema
updates.
Add new compatible strings "renesas,r9a09g077-miic" for RZ/T2H and
"renesas,r9a09g087-miic" for RZ/N2H, with the latter falling back to
the RZ/T2H variant. The new SoCs require reset support with two reset
lines for converter register reset and converter reset, which are not
present on RZ/N1.
Update port configurations to accommodate the different architectures.
RZ/N1 supports 5 ports numbered 1-5 with complex input mappings
covering indices 0-13, while RZ/T2H and RZ/N2H support 4 ports
numbered 0-3 with simplified input mappings covering indices 0-8.
Extend the switch port configuration property to support value 0 for
the new SoCs.
Add a new dt-bindings header file with media interface connection
matrix constants that map GMAC, ESC, and ETHSW ports to numeric
identifiers for use with RZ/T2H and RZ/N2H device trees.
Update DT schema validation to ensure proper port numbering and input
mappings per SoC variant.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250910204132.319975-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This pull request contains Broadcom SoC drivers updates for 6.18:
- Andrea adds the missing MIPI DSI clock defines for the RP1 and then
continues to implement the remaining clocks for the RP1 chip (ADC,
I2S, Audio in/out, DMA, MIPI, PWM, SDIO, UART, encoder)
- Akhilesh fixes a spelling typo in the bcm47xx_sprom driver
- Brian converts the RP1 clock driver to use the new determine_rate()
API
* tag 'arm-soc/for-6.18/drivers' of https://github.com/Broadcom/stblinux:
clk: rp1: convert from round_rate() to determine_rate()
drivers: firmware: bcm47xx_sprom: fix spelling
clk: rp1: Implement remaining clock tree
dt-bindings: clock: rp1: Add missing MIPI DSI defines
Link: https://lore.kernel.org/r/20250910171910.666401-4-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dt-bindings: Changes for v6.18-rc1
Support for the Tegra264 generation of I2C is documented as well as some
older Tegra devices, such as the Xiaomi Mi Pad and the ASUS 101 devices.
Contained are also some additions to existing bindings for Tegra114 and
a fix for the power supply feeding VI/CSI.
* tag 'tegra-for-6.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: tegra: Add ASUS TF101G and SL101
dt-bindings: reset: Add Tegra114 CAR header
dt-bindings: arm: tegra: Add Xiaomi Mi Pad (A0101)
dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
dt-bindings: display: tegra: Move avdd-dsi-csi-supply from VI to CSI
dt-bindings: i2c: nvidia,tegra20-i2c: Document Tegra264 I2C
Link: https://lore.kernel.org/r/20250914063927.89981-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Qualcomm Arm64 DeviceTree updates for v6.18
Add support for Lenovo Thinkbook 16, Dell Inspiron 7441, Dell Latitude
7455, Samsung Galaxy S20, Billion Capture+, the Monaco EVK and the
Lemans EVK.
The SDM845 Cheza development boards are removed, as they are not longer
in use.
For IPQ5018 crypto, tsens, rng, SPI NAND support is dded, the two MDIO
buses are added and the internal GE PHY.
IPQ5424 gets CPU frequency scaling and a missing UART.
The SA8775P SoC is remaned Lemans, to reduce confusion about the chip
name. The IoT memory map introduced and made the default, GDSP FastRPC
and GPR nodes are added.
Touch keys are enabled on the BQ Aquaris X5 Plus.
On QCM2290 the video accelerator is enabled, so is HS timing modes for
eMMC.
The QCS615 platform is renamed SM6150. CPU frequency scaling and the WiFi
PCIe controller is introduced.
On Monaco (QCS8300) scaling of L3 and DDR bandwidth is introduced. So is
eMMC support and generic packer router (GPR).
On the Monaco Ride board, the eMMC controller is enabled.
On QRB220 RB1, the venus video accelerator is enabled.
For SC7280 the first PCIe controller and PHY is introduced. SoundWire,
LPASS, and USB offload support is added, the codecs and sound card is
then described on the QCM6490 IDP. The MDSS core reset is introduced, to
clear bootloader configuration on SC7280-based devices.
On Fairphone5, USB audio offload is added.
AudioReach support on SC7280 (QCS6490) is introduced and used to
enable sound on the RB3Gen2 board.
The video clock controller is added to SC8180X.
On SC8280XP the GPI DMA controllers are described and enabled.
Display and GPU is enabled for the Fairphone 3 and charging is enabled
on the Google Pixel 3a.
The routing for the second USB connector on the Lenovo Yoga C630 is
described.
On SM6150 ADSP and CDSP FastRPC is introduced, as is the video
encoder/decoder (venus).
On SM6350 RPMh statistics is enabled, the USB audio offload DAI is
introduced and on Fairphone4 the USB audio offload support is enabled.
On SM8450 QRD the PMIC GLINK is described, to add USB Type-C and battery
functionality.
On SM8650 ACD levels are added for the GPU.
Camera and video clock controllers power-domains are updated on SM8450,
SM8550, and SM8650, now that support for multiple power-domains is
accepted.
SM8750 gains bwmon support for dynamic bus scaling, and PCIe nodes.
The DWC3 glue and core nodes are flattened on a number of platforms.
USB Type-C DisplayPort support is extended to 4 lanes (from 2) on a
variety of platforms, now that the QMP PHY driver supports this.
Platform specific RPMh PD constants are replaced with generic constants
wherever possible.
On X Elite the PM8010 is disabled by default, removing boot splats
on a variety of boards without this PMIC, the video clock controller is
added.
For the X Elite and X Plus CRDs, and the Lenovo Thinkpad T14s, HBR3 is
marked as valid for the external DisplayPorts. The fingerprint reader
found on the CRDs are enabled. The PCIe x8 slot on the QCP is enabled.
The two Microsoft Surface Laptop 7 gains WiFi and Bluetooth support.
GPU support is added for the X Plus SoC.
* tag 'qcom-arm64-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (208 commits)
arm64: dts: qcom: x1e80100: Update GPU OPP table
arm64: dts: qcom: sm8650: Drop redundant status from PMK8550 RTC
arm64: dts: qcom: add initial support for Samsung Galaxy S20
dt-bindings: arm: qcom: document x1q board binding
arm64: dts: qcom: sm8250-samsung-r8q: Move common parts to dtsi
arm64: dts: qcom: lemans-evk: Add sound card
arm64: dts: qcom: lemans: Add gpr node
arm64: dts: qcom: x1e78100-t14s-oled: Add eDP panel
arm64: dts: qcom: qcs615-ride: enable venus node to initialize video codec
arm64: dts: qcom: sm6150: add venus node to devicetree
arm64: dts: qcom: x1e80100-romulus: Add WCN7850 Wi-Fi/BT
arm64: dts: qcom: qrb2210-rb1: Enable Venus
arm64: dts: qcom: qcm2290: Add Venus video node
arm64: dts: qcom: monaco-evk: Add sound card
arm64: dts: qcom: qcs8300: Add gpr node
arm64: dts: qcom: qcs8300: Add Monaco EVK board
dt-bindings: arm: qcom: Add Monaco EVK support
arm64: dts: qcom: qcm6490-idp: Add sound card
arm64: dts: qcom: qcm6490-idp: Add WSA8830 speakers and WCD9370 headset codec
arm64: dts: qcom: qcs6490-rb3gen2: Add sound card
...
Link: https://lore.kernel.org/r/20250911233600.3033675-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are four clock controllers in the A523 SoC. The existing binding
already covers two of them that are critical for basic operation. The
remaining ones are the MCU clock controller and CPU PLL clock
controller.
Add a description for the MCU CCU. This unit controls and provides
clocks to the MCU (RISC-V) subsystem and peripherals meant to operate
under low power conditions.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250911174710.3149589-3-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The way that resets are handled on these Tegra devices is that there is a
set of peripheral clocks & resets which are paired up. This is because they
are laid out in banks within the CAR (clock and reset) controller. In most
cases we're referring to those resets, so you'll often see a clock ID used
in conjection with the same reset ID for a given IP block.
In addition to those peripheral resets, there are a number of extra resets
that don't have a corresponding clock and which are exposed in registers
outside of the peripheral banks, but still part of the CAR. To support
those "special" registers, the TEGRA*_RESET() is used to denote resets
outside of the regular peripheral resets. Essentially it defines the offset
within the CAR at which special resets start. In the above case, Tegra114
has 5 banks with 32 peripheral resets each. The first special reset,
TEGRA114_RESET(0), therefore gets ID 5 * 32 + 0 = 160.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
clk-tegra30 source.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add clock management unit bindings for PERIC0 and PERIC1 blocks
which provide clocks for USI, I2C and UART peripherals.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
