ba6617bd47
Migrate the arm-optimized BLAKE2b code from arch/arm/crypto/ to lib/crypto/arm/. This makes the BLAKE2b library able to use it, and it also simplifies the code because it's easier to integrate with the library than crypto_shash. This temporarily makes the arm-optimized BLAKE2b code unavailable via crypto_shash. A later commit reimplements the blake2b-* crypto_shash algorithms on top of the BLAKE2b library API, making it available again. Note that as per the lib/crypto/ convention, the optimized code is now enabled by default. So, this also fixes the longstanding issue where the optimized BLAKE2b code was not enabled by default. To see the diff from arch/arm/crypto/blake2b-neon-glue.c to lib/crypto/arm/blake2b.h, view this commit with 'git show -M10'. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251018043106.375964-8-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
102 lines
3.5 KiB
Plaintext
102 lines
3.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "Accelerated Cryptographic Algorithms for CPU (arm)"
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config CRYPTO_GHASH_ARM_CE
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tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AEAD
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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select CRYPTO_LIB_AES
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select CRYPTO_LIB_GF128MUL
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help
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GCM GHASH function (NIST SP800-38D)
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Architecture: arm using
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- PMULL (Polynomial Multiply Long) instructions
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- NEON (Advanced SIMD) extensions
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- ARMv8 Crypto Extensions
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions, or a slower variant that
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uses the vmull.p8 instruction that is part of the basic NEON ISA.
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config CRYPTO_NHPOLY1305_NEON
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tristate "Hash functions: NHPoly1305 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_NHPOLY1305
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help
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NHPoly1305 hash function (Adiantum)
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Architecture: arm using:
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- NEON (Advanced SIMD) extensions
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config CRYPTO_AES_ARM
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tristate "Ciphers: AES"
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Block ciphers: AES cipher algorithms (FIPS-197)
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Architecture: arm
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On ARM processors without the Crypto Extensions, this is the
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fastest AES implementation for single blocks. For multiple
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blocks, the NEON bit-sliced implementation is usually faster.
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This implementation may be vulnerable to cache timing attacks,
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since it uses lookup tables. However, as countermeasures it
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disables IRQs and preloads the tables; it is hoped this makes
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such attacks very difficult.
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config CRYPTO_AES_ARM_BS
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tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (bit-sliced NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AES_ARM
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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The bit sliced AES code does not use lookup tables, so it is believed
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to be invulnerable to cache timing attacks. However, since the bit
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sliced AES code cannot process single blocks efficiently, in certain
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cases table-based code with some countermeasures against cache timing
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attacks will still be used as a fallback method; specifically CBC
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encryption (not CBC decryption), the encryption of XTS tweaks, XTS
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ciphertext stealing when the message isn't a multiple of 16 bytes, and
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CTR when invoked in a context in which NEON instructions are unusable.
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config CRYPTO_AES_ARM_CE
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tristate "Ciphers: AES, modes: ECB/CBC/CTS/CTR/XTS (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- CTS (Cipher Text Stealing) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Architecture: arm using:
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- ARMv8 Crypto Extensions
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endmenu
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