From 3396e7d4aae81717a455a6427f4a218b2c99e408 Mon Sep 17 00:00:00 2001 From: Wadim Egorov Date: Tue, 13 Jan 2026 06:35:29 +0100 Subject: [PATCH] configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4 Enable command for verifying DDRSS inline ECC features. Signed-off-by: Wadim Egorov --- configs/phycore_am62ax_a53_defconfig | 1 + configs/phycore_am62x_a53_defconfig | 1 + configs/phycore_am64x_a53_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/phycore_am62ax_a53_defconfig b/configs/phycore_am62ax_a53_defconfig index ab50545d307..a0423b80721 100644 --- a/configs/phycore_am62ax_a53_defconfig +++ b/configs/phycore_am62ax_a53_defconfig @@ -78,6 +78,7 @@ CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y +CONFIG_CMD_DDR4=y CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig index fa5c4466791..afed0bfafc6 100644 --- a/configs/phycore_am62x_a53_defconfig +++ b/configs/phycore_am62x_a53_defconfig @@ -80,6 +80,7 @@ CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y +CONFIG_CMD_DDR4=y CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index fcf61590c60..d0b33661cf6 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -80,6 +80,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y +CONFIG_CMD_DDR4=y CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y