342 Commits

Author SHA1 Message Date
Tom Rini
ff134dcb02 gw_ventana: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-By: Tim Harvey <tharvey@gateworks.com>
2025-11-29 14:42:24 -03:00
Tim Harvey
6dc91a8408 venice: display DRAM MR registers and decoding if debug enabled
While this is interesting and useful for debugging there isn't extremely
useful information so we will only show it if debug is enabled.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2025-07-17 09:58:42 -03:00
Tim Harvey
2c692bff83 venice: lpddr4_timing_imx8mm: update ddr phy config for mscale_v3.10
Update the ddr phy config values to those created by the mscale_v3.10
tool. The original values were obtained using mscale_v3.10. The v3.10
tool removed ddr phy register values of 0x0.

This has no functional change but makes comparing and patching ddr
configuration easier in addition to slightly shrinking the DRAM config
size.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2025-07-17 09:58:42 -03:00
Tim Harvey
c2bfdb24c8 venice: lpddr4_timing_imx8mm: add 4gb single die support
Add dram support for the MT53E1G32D2FW-046 RevC part which is a single die
32Gbit density part vs RevA/B which were dual-die parts:
 - use a previously unused EEPROM byte to denote a variant of the
   base config to be patched
 - add a dram description string
 - return the board struct from eeprom_init and pass it to the
   spl_dram_init function so that it has access to the EEPROM
 - move ddr_init into the spl_dram_init so that it can be patched
   in the per-soc init function

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2025-07-17 09:58:42 -03:00
Tim Harvey
393c3de771 venice: lpddr4_timing_imx8mm: add DDRC_ADDRMAP7 config
Add the configuration register for DDRC_ADDRMAP7 which was added in the
RAP spreadsheet v19. This has no functional change but allows DRAM
configuration to be patched in a later commit.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2025-07-17 09:58:42 -03:00
Tom Rini
03817a2a80 Merge patch series "Hex value prefix case cleanup"
E Shattow <e@freeshell.de> says:

Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot.

There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix
or placeholder in documentation and error messages.

External devicetree-rebasing dts/upstream and the generated code of
xilinx/zynq are ignored for the series.

Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de
2025-06-14 09:10:48 -06:00
E Shattow
ba7634c6b6 board: use lowercase hex prefix style
Use consistent lowercase hex prefix style in board/*

Does not change auto-generated files in xilinx/zynq/*/ps7_init_gpl.c

Signed-off-by: E Shattow <e@freeshell.de>
2025-06-14 09:09:39 -06:00
Tim Harvey
314469b6ba board: venice: append configuration string to model
Append the optional board configuration string to the model info.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
41bc2d5334 board: venice: update model representation for venice-flex
Update the model string representation for the Venice-Flex product
family (GW8xxx).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
da9e2218af board: venice: add FSA support
The Gateworks Flexible Socket Adapters adapt common
busses such as SDIO/UART/USB/PCI to various connectors
such as M.2 B-Key, M.2 E-Key, M.2 M-Key, and MiniPCIe.

Each FSA has an EEPROM onboard describing its details as well as an
optional port-expander for configurable GPIO's.

Add support for identifying the FSA's and configuring their
details such as user description and GPIO's:
 - enable pca953x, pca954x and eeprom support for communicating
   with the I2C eeprom and gpio port expander on the FSA
 - add FSA detection support
 - add FSA gpio configuration support

Each FSA is identified in the device-tree by an alias to it's I2C
bus where an eeprom@54 node must exist as well as an gpio@20 node
for an io-expander. These nodes must be enabled so that
they can be probed to determine if they are actually present in
the system. If not present or not enabled the gpio expander can
not be used. This also requires livetree as the gpio expander
node if not present must be disabled.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
5e72676890 board: venice: flip logic for GSC supervisor enable
Flip the logic used to determine if a board has the proper hardware to
support enabling the GSC voltage supervisor so that we do not need to
keep adding new models to the list.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
b1ead5a224 board: venice: use SOM model for PMIC adjustment on SOM
Use the SOM model to adjust PMIC settings on SOM's.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
ea04f7261e board: venice: use baseboard model for family
The venice family of baseboards which is normally GW7xxx
is being expanded to GW8xxx so we need to use the baseboard
number instead of the som.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
c83ab82640 board: venice: fix dram size for GW7901-SP486
The GW7901-SP486 with the exception of the -C revision has 2GB DRAM
loaded but incorrectly specifies 1GB in the EEPROM. Adjust the DRAM size
to account for this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:55 -03:00
Tim Harvey
1bf9f1e550 board: venice: fix dram bus config for GW7902/GW7903/GW7904
The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
of the DDRC and DDR PHY registers.

The 512MB configuration used this alternate bus layout. Change
the 512MB config to the standard bus configuration and add a generic
function to patch the DDRC/PHY configs for the alternate bus layout.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:55 -03:00
Tim Harvey
66e8b17eee board: venice: move soc-specific dram config into soc-specific files
Move the determination of the dram timings into the soc-specific files.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:55 -03:00
Tom Rini
ae9ff5ae6f global: Avoid indirect inclusion of <env.h> from <net.h>
Now that env_get_ip() has been removed, the include file <net.h> does
not need anything from <env.h>. Furthermore, include/env.h itself
includes other headers which can lead to longer indirect inclusion
paths. To prepare to remove <env.h> from <net.h> fix all of the
remaining places which had relied on this indirect inclusion to instead
include <env.h> directly.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> # net/lwip
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-29 08:30:25 -06:00
Simon Glass
600145a8e1 venice: Include env.h to permit reading the environment
This file reads from the environment but does not include the correct
header. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-05-29 08:30:25 -06:00
Tim Harvey
aa233d26bd board: gateworks: venice: rename GW7905 to GW7500
The GW7905 was renamed to GW7500 before release. Change the various
names in the dt files and references.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-27 14:34:45 -06:00
Simon Glass
dac3ce976a board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Tom Rini
208fc7a9f9 Merge patch series "provide names for emmc hardware partitions"
Tim Harvey <tharvey@gateworks.com> says:

Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
 Boot Area Partition 1
 Boot Area Partition 2
 RPMB Partition
 General Purpose Partition 1
 General Purpose Partition 2
 General Purpose Partition 3
 General Purpose Partition 4
 User Data Area

These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
  0x0: No boot acknowledge sent (default
  0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
  0x0: Device not boot enabled (default)
  0x1: Boot Area partition 1 enabled for boot
  0x2: Boot Area partition 2 enabled for boot
  0x3-0x6: Reserved
  0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
  0x0: No access to boot partition (default)
  0x1: Boot Area partition 1
  0x2: Boot Area partition 2
  0x3: Replay Protected Memory Block (RPMB)
  0x4: Access to General Purpose partition 1
  0x5: Access to General Purpose partition 2
  0x6: Access to General Purpose partition 3
  0x7: Access to General Purpose partition 4

Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.

You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.

U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
EXT_CSD_BOOT_ACK_ENABLE                 (1 << 6)
EXT_CSD_BOOT_PARTITION_ENABLE           (1 << 3)
EXT_CSD_PARTITION_ACCESS_ENABLE         (1 << 0)
EXT_CSD_PARTITION_ACCESS_DISABLE        (0 << 0)

EXT_CSD_BOOT_ACK(x)             (x << 6)
EXT_CSD_BOOT_PART_NUM(x)        (x << 3)
EXT_CSD_PARTITION_ACCESS(x)     (x << 0)

EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)

There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field used by the various mmc_switch incarnations.

To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.

Additionally provide arrays of the field names and allow those to be
used in the 'mmc partconf' command and in board support files.

The first patch adds enumerated types and makes use of them which
represents no compiled code change.

The 2nd patch adds the array of names and uses them in the 'mmc
partconf' command.

The 3rd patch uses the array of hardware partition names in a board
support file to show what emmc hardware partition U-Boot is being loaded
from.
2024-09-05 12:13:24 -06:00
Tim Harvey
1f239b6feb venice: show emmc boot hardware partition
To aid in understanding what emmc hardware partition is being
used to boot on power-up, display the hardware partition name in the
SPL.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-09-05 12:12:51 -06:00
Tim Harvey
8746aa0f5d mmc: use an enumerated type to represent PARTITION_CONFIG fields
Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
  Boot Area Partition 1
  Boot Area Partition 2
  RPMB Partition
  General Purpose Partition 1
  General Purpose Partition 2
  General Purpose Partition 3
  General Purpose Partition 4
  User Data Area

These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
  0x0: No boot acknowledge sent (default
  0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
  0x0: Device not boot enabled (default)
  0x1: Boot Area partition 1 enabled for boot
  0x2: Boot Area partition 2 enabled for boot
  0x3-0x6: Reserved
  0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
  0x0: No access to boot partition (default)
  0x1: Boot Area partition 1
  0x2: Boot Area partition 2
  0x3: Replay Protected Memory Block (RPMB)
  0x4: Access to General Purpose partition 1
  0x5: Access to General Purpose partition 2
  0x6: Access to General Purpose partition 3
  0x7: Access to General Purpose partition 4

Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.

You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.

U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:

There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field which is also the value used to specify the
hardware partition of the various mmc_switch incarnations.

To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.

This represents no code changes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-09-05 12:12:51 -06:00
Tim Harvey
6888c934e7 board: gateworks: venice: Simplify Ethernet initialization
With DM enabled, there is no need for board code to initialize
the Ethernet interfaces.

Specifically board_interface_eth_init will handle the configuration of
GPR1.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-06-24 09:23:06 -03:00
Tim Harvey
1afac8bd30 board: gateworks: venice: add print for GPY111 PHY name
Due to supply chain issues Venice boards use either a DP83867 or a
GPY111 RGMII PHY. We already print an identifier for the DP83867 so add
one for the GPY111 to better identify what PHY is on a board:

Example:
 Net:   GPY111 eth0: ethernet@30be0000 [PRIME]
 Net:   DP83867 eth0: ethernet@30be0000 [PRIME]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-06-24 09:19:26 -03:00
Tim Harvey
87a4e5b3a4 board: gateworks: venice: delay before reading GSC EEPROM
Extensive testing has shown that at higher temperatures operating
without a GSC backup battery, the GSC needs a small delay after
releasing the I2C SDA/SCL pins before it is ready to handle I2C
requests.

Add a delay to avoid errors such as:
wait_for_sr_state: Arbitration lost sr=93 cr=80 state=2020
i2c_init_transfer: failed for chip 0x20 retry=0

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-06-24 09:19:10 -03:00
Tim Harvey
ef0b5b61f4 board: gateworks: venice: enable GSC supervisor for new board models
The Gateworks System Controller (GSC) has a voltage supervisor which is
disabled by default. On older boards we want to maintian this but on
newer boards we wish to enable the voltage supervisor.

The Gateworks System Controller (GSC) can disable the board primary
power supply by driving a pin to a FET high. On older board models
the leakage of the GSC may exceed the leakage of the FET causing this
signal slowly rise when the GSC battery is low and the board is in a
powered down state resulting in the board being kept in a disabled
state.

Newer boards have a hardware fix to avoid this leakage and thus should
enable the voltage supervisor.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-06-24 09:18:49 -03:00
Tom Rini
03de305ec4 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20 13:35:03 -06:00
Tom Rini
d678a59d2d Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d, reversing
changes made to 2ee6f3a5f7.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19 08:16:36 -06:00
Tom Rini
5b1d20b51a board: gateworks: Remove <common.h> and add needed includes
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.

Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07 08:00:24 -06:00
Tim Harvey
8d22015d23 board: gateworks: venice: fix dt adjustment for gw73xx baseboard for imx8mp
The GW73xx baseboard needs a PCI dt adjustment for revC/D based on a
change of the PCIe switch. Make sure we are only doing this for a pci
based ethernet to avoid causing a boot hang when the ethernet1 alias
points to eqos or fec. To know this is a pcie device ensure the alias
begins with the pcie controller.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-04-20 00:36:45 -03:00
Tim Harvey
86b79cf131 imx8m*_venice: move venice to OF_UPSTREAM
Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
 - replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
   dt's from the OF_LIST
 - handle the fact that dtbs now have a 'freescale/' prefix
 - imply OF_UPSTREAM
 - remove rudundant files from arch/arm/dts leaving only the
   *-u-boot.dtsi files

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-17 18:39:54 -03:00
Tim Harvey
4f7122ca15 imx8mp-venice: update DRAM config for 2000MHz
The imx8mp venice boards can support 2000Mhz DRAM.
Update the DRAM config to support this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14 15:34:12 -03:00
Tim Harvey
f51559cc58 imx8mp-venice: fix DRAM bus configuration
The DRAM configuration for the 1GB and 4GB imx8mp venice boards had a
bus mapping issue (channel A and B swapped) which creates an invalid
deskewing configuration during training causing the DRAM to not be able
to run at its full bus speed.

Update the various config structures to resolve this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14 15:34:12 -03:00
Tim Harvey
9c288d569c board: gateworks: venice: remove extra file
Remove lpddr4_timing_imx8mm_512mb.c mistakenly committed

Fixes: a1c711046b "(board: gateworks: venice: add imx8mm-gw7903 support)"
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14 15:34:12 -03:00
Tim Harvey
ad3a4f91e7 board: gateworks: venice: add fixup for GW73xx-F+
GW73xx-F board revision switched back to the original PCIe switch due to
part availability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12 09:21:48 -03:00
Marek Vasut
e936db9536 spl: mmc: Introduce proper layering for spl_mmc_get_uboot_raw_sector()
Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and
board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at
a matching level, that is arch/ and board/ , in addition to the existing
weak function spl_mmc_get_uboot_raw_sector().

This way, architecture code can define a default architecture specific
implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board
code can override that using board_spl_mmc_get_uboot_raw_sector() which
takes precedence over the architecture code. In some sort of unlikely
special case where code has to take precedence over board code too, the
spl_mmc_get_uboot_raw_sector() is still left out to be a weak function,
but it should be unlikely that this is ever needed to be overridden.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-17 23:55:10 +02:00
Tim Harvey
7db3404e0f board: gateworks: venice: updates for imx8mp-venice-gw74xx revB PCB
Update the imx8mp-venice-gw74xx for revB:
 - add CAN1
 - add TIS-TPM on SPI2
 - add FAN controller
 - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for
   backward compatible option)
 - M2 socket GPIO's moved

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16 08:46:01 +02:00
Shiji Yang
506df9dc58 treewide: rework linker symbol declarations in sections header
1. Convert all linker symbols to char[] type so that we can get the
   corresponding address by calling array name 'var' or its address
   '&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
   not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
   only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
   standard header file to declare them.

[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00
Tim Harvey
c8645e7411 configs: imx8m: Prepare imx8m-venice boards for HAB support
In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.

This also needs to occur in the SPL so enable CONFIG_SPL_BOARD_INIT and
add a void spl_board_init function which calls arch_misc_init to probe
the CAAM driver.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Tim Harvey
3d634b0b44 board: gateworks: venice: switch to 2-bank dram config
Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Tim Harvey
48c6f9777c board: gateworks: venice: add imx8mp-gw7905-2x support
The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard.

The GW702x SOM contains the following:
 - i.MX8M Plus SoC
 - LPDDR4 memory
 - eMMC Boot device
 - Gateworks System Controller (GSC) with integrated EEPROM, button
   controller, and ADC's
 - PMIC
 - SOM connector providing:
  - eQoS GbE MII
  - 1x SPI
  - 2x I2C
  - 4x UART
  - 2x USB 3.0
  - 1x PCI
  - 1x SDIO (4-bit 3.3V)
  - 1x SDIO (4-bit 3.3V/1.8V)
  - GPIO

The GW7905 Baseboard contains the following:
 - GPS
 - microSD
 - off-board I/O connector with I2C, SPI, GPIO
 - EERPOM
 - PCIe clock generator
 - 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0
 - 1x half-length miniPCIe socket with USB2.0 and USB3.0
 - USB 3.0 HUB
 - USB Type-C with USB PD Sink capability and peripheral support
 - USB Type-C with USB 3.0 host support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:05 +02:00
Tim Harvey
80fbbf4c81 board: gateworks: venice: display dram speed
Display dram speed during configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:05 +02:00
Tim Harvey
a59b3cd035 board: gateworks: venice: assume emmc device for USB boot
When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:05 +02:00
Tim Harvey
7b39e5b53a board: gateworks: venice: dynamically update the update_firmware script
The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.

Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
  hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
  partition.

Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:03 +02:00
Tim Harvey
2c2cc1eaab board: gateworks: venice: dynamically determine U-Boot env partition
Determine the U-Boot env hardware partition depending on the boot
device.

This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:03 +02:00
Tim Harvey
8236c05ddb board: gateworks: venice: dynamically determine U-Boot raw sector
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to adjust for
IMX8MN and IMX8MP when booting from an eMMC boot partition due
to IMX BOOTROM v2 using an SPL offset of 0 for boot partitions
and 32K for the user partition.

In order to allow the same firmware to run on both user and boot
hardware partitions adjust raw_sect dynamically at runtime.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:03 +02:00
Tim Harvey
c226f84256 board: gateworks: venice: add eraseenv command
Add eraseenv command and remove the unnecessary env command.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-07-11 14:40:03 +02:00
Marek Vasut
599474120a arm64: imx8mp: Drop EQoS GPR[1] board workaround
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-03-30 13:51:33 +02:00
Tim Harvey
27d6ea5382 configs: remove gwventana_gw5904_defconfig
Now that the gwventana_emmc_defconfig is the same as the
gwventana_gw5904_defconfig we can remove the latter.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-03-30 08:40:27 +02:00