057b1f8df9
The current default boot command does not respect the Linux kernel 2 MiB
alignment requirement, present on aarch64 [1]:
"
The Image must be placed text_offset bytes from a 2MB aligned base
address anywhere in usable system RAM and called there.
"
Adjust the boot command such, that it always places both Image and DT at
the nearest highest 2 MiB aligned offset. The DT is placed at lower 2 MiB
aligned address, the aarch64 Image is placed at the next higher 2 MiB
aligned address. Is is unlikely that a DT would be larger than 2 MiB on
these systems.
Replace use of hard-coded load addresses with generic ${loadaddr} aligned
using setexpr. This way, if user picks valid ${loadaddr}, their kernel and
DT address will be correctly set as well.
Fix up boot commands to use && instead of ; to exit the boot command early
in case of failure.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm64/booting.rst#n138
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
74 lines
2.2 KiB
Plaintext
74 lines
2.2 KiB
Plaintext
#include <configs/renesas_rcar3.config>
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CONFIG_ARM=y
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CONFIG_ARCH_RENESAS=y
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CONFIG_RCAR_GEN3=y
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CONFIG_COUNTER_FREQUENCY=16666666
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0xFFFE0000
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CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-ulcb"
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CONFIG_SPL_TEXT_BASE=0xe6338000
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CONFIG_TARGET_ULCB=y
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CONFIG_SPL_HAVE_INIT_STACK=y
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CONFIG_SPL_STACK=0xe6304000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0xe633f000
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CONFIG_SPL_BSS_MAX_SIZE=0x1000
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CONFIG_SYS_MONITOR_BASE=0x00000000
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CONFIG_USE_BOOTARGS=y
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="setexpr dloadaddr ${loadaddr} + 0x200000 && setexpr dloadaddr ${dloadaddr} \\\\& 0xffc00000 && setexpr kloadaddr ${dloadaddr} + 0x200000 && tftp ${dloadaddr} Image-r8a77951-ulcb.dtb && tftp ${kloadaddr} Image && booti ${kloadaddr} - ${dloadaddr}"
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CONFIG_DEFAULT_FDT_FILE="r8a77951-ulcb.dtb"
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_CMD_DFU=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_OF_LIST="renesas/r8a77951-ulcb renesas/r8a77960-ulcb renesas/r8a77965-ulcb"
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CONFIG_MULTI_DTB_FIT_LZO=y
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CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
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CONFIG_OF_DTB_PROPS_REMOVE=y
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CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-extended interrupt-names interrupt-map interrupt-map-mask iommus"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_RELOC_GD_ENV_ADDR=y
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CONFIG_ENV_MMC_EMMC_HW_PARTITION=2
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CONFIG_DFU_TFTP=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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CONFIG_SYS_I2C_RCAR_IIC=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x70
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
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CONFIG_CFI_FLASH=y
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CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_PROTECTION=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_FLASH_QUIET_TEST=y
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CONFIG_RENESAS_RPC_HF=y
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CONFIG_SYS_MAX_FLASH_SECT=256
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CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_RENESAS_RAVB=y
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CONFIG_SYSINFO=y
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CONFIG_SYSRESET=y
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CONFIG_TEE=y
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CONFIG_OPTEE=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_STORAGE=y
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