74fc581374
Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig and common RZ/A1 SoC defconfig. This is a preparatory patch for new RZ/A1 boards, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
56 lines
1.2 KiB
Plaintext
56 lines
1.2 KiB
Plaintext
CONFIG_ARCH_CPU_INIT=y
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CONFIG_SYS_MALLOC_LEN=0x100000
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CONFIG_SYS_MALLOC_F_LEN=0x400
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# CONFIG_BOARD_EARLY_INIT_F is not set
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# CONFIG_CMD_ELF is not set
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_EFI_LOADER is not set
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# CONFIG_MMC is not set
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CONFIG_BITBANGMII=y
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CONFIG_BOOTARGS="ignore_loglevel"
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CONFIG_BOOTDELAY=3
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_SNTP=y
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CONFIG_CMD_USB=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000
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CONFIG_DM_ETH_PHY=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_SPI=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MAC_PARTITION=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_OF_CONTROL=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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CONFIG_PHY_SMSC=y
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CONFIG_PINCTRL=y
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CONFIG_RENESAS_OSTM_TIMER=y
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CONFIG_RENESAS_RPC_SPI=y
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CONFIG_RZA1=y
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CONFIG_RZA1_GPIO=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SH_ETHER=y
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CONFIG_SPI=y
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_CLK_FREQ=66666666
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CONFIG_SYS_LOAD_ADDR=0x20400000
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CONFIG_SYS_MONITOR_LEN=524288
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CONFIG_SYS_PBSIZE=256
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CONFIG_TIMER=y
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CONFIG_USB=y
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CONFIG_USB_R8A66597_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_USE_BOOTARGS=y
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