3c43ca3025
If CONFIG_OF_PLATDATA=y , then the udevice has no valid OF node associated with it and ofnode_valid(node) evaluates to 0. The dev_read_u32_default() call ultimately reaches ofnode_read_u32_index() which invokes fdt_getprop() and passes result of ofnode_to_offset(node) as an offset parameter into it. The ofnode_to_offset(node) returns -1 for invalid node, which leads to an fdt_getprop(..., -1, ...) invocation, which will crash sandbox with SIGSEGV because libfdt can not handle negative node offsets without full tree check, which U-Boot inhibits to keep size lower. Add dev_has_ofnode(dev) check and do not assign clock rate in case the device has no valid node associated with it, and do not call any of the dev_read_*() functions for devices without valid nodes. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
116 lines
2.5 KiB
C
116 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#define LOG_CATEGORY UCLASS_CLK
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#include <clk-uclass.h>
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#include <dm.h>
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#include <log.h>
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#include <dm/device-internal.h>
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#include <linux/clk-provider.h>
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#define UBOOT_DM_CLK_FIXED_RATE "fixed_rate_clock"
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#define UBOOT_DM_CLK_FIXED_RATE_RAW "fixed_rate_raw_clock"
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static ulong clk_fixed_rate_get_rate(struct clk *clk)
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{
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return to_clk_fixed_rate(clk->dev)->fixed_rate;
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}
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/* avoid clk_enable() return -ENOSYS */
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static int dummy_enable(struct clk *clk)
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{
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return 0;
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}
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const struct clk_ops clk_fixed_rate_ops = {
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.get_rate = clk_fixed_rate_get_rate,
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.enable = dummy_enable,
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.disable = dummy_enable,
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};
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void clk_fixed_rate_ofdata_to_plat_(struct udevice *dev,
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struct clk_fixed_rate *plat)
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{
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struct clk *clk = &plat->clk;
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if (dev_has_ofnode(dev))
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plat->fixed_rate = dev_read_u32_default(dev, "clock-frequency",
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0);
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/* Make fixed rate clock accessible from higher level struct clk */
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/* FIXME: This is not allowed */
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dev_set_uclass_priv(dev, clk);
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clk->dev = dev;
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clk->id = CLK_ID(dev, 0);
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clk->enable_count = 0;
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}
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static ulong clk_fixed_rate_raw_get_rate(struct clk *clk)
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{
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return container_of(clk, struct clk_fixed_rate, clk)->fixed_rate;
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}
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const struct clk_ops clk_fixed_rate_raw_ops = {
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.get_rate = clk_fixed_rate_raw_get_rate,
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};
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static int clk_fixed_rate_of_to_plat(struct udevice *dev)
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{
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clk_fixed_rate_ofdata_to_plat_(dev, to_clk_fixed_rate(dev));
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return 0;
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}
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#if CONFIG_IS_ENABLED(CLK_CCF)
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struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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ulong rate)
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{
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struct clk *clk;
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struct clk_fixed_rate *fixed;
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int ret;
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fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
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if (!fixed)
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return ERR_PTR(-ENOMEM);
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fixed->fixed_rate = rate;
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clk = &fixed->clk;
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ret = clk_register(clk, UBOOT_DM_CLK_FIXED_RATE_RAW, name, NULL);
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if (ret) {
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kfree(fixed);
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return ERR_PTR(ret);
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}
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return clk;
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}
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#endif
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static const struct udevice_id clk_fixed_rate_match[] = {
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{
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.compatible = "fixed-clock",
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},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(fixed_clock) = {
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.name = "fixed_clock",
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.id = UCLASS_CLK,
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.of_match = clk_fixed_rate_match,
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.of_to_plat = clk_fixed_rate_of_to_plat,
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.plat_auto = sizeof(struct clk_fixed_rate),
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.ops = &clk_fixed_rate_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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U_BOOT_DRIVER(clk_fixed_rate_raw) = {
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.name = UBOOT_DM_CLK_FIXED_RATE_RAW,
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.id = UCLASS_CLK,
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.ops = &clk_fixed_rate_raw_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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