8e25e76fff
This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170 boards. This boards are based on the Xilinx Zynq SoC. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20250404072819.69642-5-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
22 lines
506 B
C
22 lines
506 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Config file for BR Zynq board
|
|
*
|
|
* Copyright (C) 2024
|
|
* B&R Industrial Automation GmbH - http://www.br-automation.com/
|
|
*/
|
|
|
|
#ifndef __CONFIG_BRZYNQ_H__
|
|
#define __CONFIG_BRZYNQ_H__
|
|
|
|
/* Increase PHY_ANEG_TIMEOUT since the FPGA needs some setup time */
|
|
#if IS_ENABLED(CONFIG_SPL_FPGA)
|
|
#define PHY_ANEG_TIMEOUT 8000
|
|
#endif
|
|
|
|
/* Use top mapped SRAM */
|
|
#define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000
|
|
#define CFG_SYS_INIT_RAM_SIZE 0x2000
|
|
|
|
#endif /* __CONFIG_BRZYNQ_H__ */
|