The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).
This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
120 lines
3.4 KiB
Plaintext
120 lines
3.4 KiB
Plaintext
config USB_DWC3
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bool "DesignWare USB3 DRD Core Support"
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depends on USB_XHCI_HCD || USB_GADGET
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select DEVRES
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help
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Say Y here if your system has a Dual Role SuperSpeed
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USB controller based on the DesignWare USB3 IP Core.
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if USB_DWC3
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config USB_DWC3_GADGET
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bool "USB Gadget support for DWC3"
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default y
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depends on USB_GADGET
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select USB_GADGET_DUALSPEED
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comment "Platform Glue Driver Support"
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config USB_DWC3_OMAP
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bool "Texas Instruments OMAP5 and similar Platforms"
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depends on ARCH_OMAP2PLUS
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help
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Some platforms from Texas Instruments like OMAP5, DRA7xxx and
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AM437x use this IP for USB2/3 functionality.
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Say 'Y' here if you have one such device
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config USB_DWC3_GENERIC
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bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)"
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depends on DM_USB && USB_DWC3 && MISC
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help
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Select this for Xilinx ZynqMP and similar Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config SPL_USB_DWC3_GENERIC
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bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue) for the SPL"
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depends on SPL_DM_USB && USB_DWC3 && SPL_MISC
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help
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Select this for Xilinx ZynqMP and similar Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config SPL_USB_DWC3_AM62
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bool "TI AM62 USB wrapper"
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depends on SPL_DM_USB && SPL_USB_DWC3_GENERIC && SPL_SYSCON && ARCH_K3
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help
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Select this for TI AM62 Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config USB_DWC3_AM62
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bool "TI AM62 USB wrapper"
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depends on DM_USB && USB_DWC3_GENERIC && SYSCON && ARCH_K3
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help
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Select this for TI AM62 Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config USB_DWC3_MESON_G12A
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bool "Amlogic Meson G12A USB wrapper"
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depends on DM_USB && USB_DWC3 && ARCH_MESON
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select PHY
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help
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Select this for Amlogic Meson G12A Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config USB_DWC3_MESON_GXL
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bool "Amlogic Meson GXL USB wrapper"
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depends on DM_USB && USB_DWC3 && ARCH_MESON
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select PHY
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help
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Select this for Amlogic Meson GXL and GXM Platforms.
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This wrapper supports Host and Peripheral operation modes.
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config USB_DWC3_UNIPHIER
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bool "DesignWare USB3 Host Support on UniPhier Platforms"
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depends on ARCH_UNIPHIER && USB_DWC3
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select USB_DWC3_GENERIC
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select PHY
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select PHY_UNIPHIER_USB3
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help
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Support of USB2/3 functionality in Socionext UniPhier platforms.
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Say 'Y' here if you have one such device.
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config USB_DWC3_LAYERSCAPE
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bool "Freescale Layerscape platform support"
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depends on DM_USB && USB_DWC3
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depends on !USB_XHCI_FSL && ARM
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help
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Select this for Freescale Layerscape Platforms.
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Host and Peripheral operation modes are supported. OTG is not
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supported.
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config USB_DWC3_STI
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bool "STi USB wrapper"
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depends on DM_USB && USB_DWC3_GENERIC && SYSCON
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help
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Enables support for the on-chip xHCI controller on STMicroelectronics
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STiH407 family SoCs. This is a driver for the dwc3 to provide the
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glue logic to configure the controller.
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menu "PHY Subsystem"
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config USB_DWC3_PHY_OMAP
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bool "TI OMAP SoC series USB DRD PHY driver"
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depends on ARCH_OMAP2PLUS
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help
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Enable single driver for both USB2 PHY programming and USB3 PHY
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programming for TI SoCs.
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config USB_DWC3_PHY_SAMSUNG
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bool "Exynos5 SoC series USB DRD PHY driver"
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depends on ARCH_EXYNOS
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help
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Enable USB DRD PHY support for Exynos 5 SoC series.
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This driver provides PHY interface for USB 3.0 DRD controller
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present on Exynos5 SoC series.
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endmenu
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endif
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