2a00d73d08
Make the raw-mode options depend on SPL_SYS_MMCSD_RAW_MODE in a more direct way. This makes it easier to understand the options with 'make menuconfig'. There are three different ways of specifying the offset: - sector offset - partition number - partition type So make these a choice, so it is more obvious what is going on. Update existing boards to enable SPL_SYS_MMCSD_RAW_MODE where needed. Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Simon Glass <sjg@chromium.org>
130 lines
3.3 KiB
Plaintext
130 lines
3.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_K3=y
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CONFIG_SYS_MALLOC_LEN=0x08000000
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CONFIG_SYS_MALLOC_F_LEN=0x9000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SOC_K3_AM625=y
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CONFIG_TARGET_AM625_R5_EVM=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0
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CONFIG_SF_DEFAULT_SPEED=25000000
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_ENV_SIZE=0x20000
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CONFIG_DM_GPIO=y
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CONFIG_SPL_DM_SPI=y
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CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk"
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CONFIG_SPL_TEXT_BASE=0x43c00000
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CONFIG_DM_RESET=y
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL_STACK_R_ADDR=0x82000000
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x43c3b000
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CONFIG_SPL_BSS_MAX_SIZE=0x3000
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_SIZE_LIMIT=0x3A7F0
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CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
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CONFIG_SPL_FS_FAT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
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CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
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CONFIG_SPL_MAX_SIZE=0x3B000
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CONFIG_SPL_PAD_TO=0x0
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CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_SYS_MALLOC=y
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CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
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CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
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CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
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CONFIG_SPL_EARLY_BSS=y
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CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
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CONFIG_SPL_DM_MAILBOX=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_SPL_DM_RESET=y
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CONFIG_SPL_POWER_DOMAIN=y
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CONFIG_SPL_RAM_SUPPORT=y
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CONFIG_SPL_RAM_DEVICE=y
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CONFIG_SPL_REMOTEPROC=y
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# CONFIG_SPL_SPI_FLASH_TINY is not set
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CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_REMOTEPROC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_SPL_MULTI_DTB_FIT=y
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CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_SPL_CLK_CCF=y
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CONFIG_SPL_CLK_K3_PLL=y
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CONFIG_SPL_CLK_K3=y
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CONFIG_TI_SCI_PROTOCOL=y
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CONFIG_DA8XX_GPIO=y
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CONFIG_DM_MAILBOX=y
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CONFIG_K3_SEC_PROXY=y
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CONFIG_SPL_MISC=y
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CONFIG_ESM_K3=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ADMA=y
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CONFIG_SPL_MMC_SDHCI_ADMA=y
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CONFIG_MMC_SDHCI_AM654=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_SOFT_RESET=y
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CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_S28HX_T=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINCTRL_GENERIC is not set
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CONFIG_PINCTRL_SINGLE=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_TI_POWER_DOMAIN=y
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CONFIG_K3_SYSTEM_CONTROLLER=y
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CONFIG_REMOTEPROC_TI_K3_ARM64=y
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CONFIG_RESET_TI_SCI=y
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CONFIG_SPECIFY_CONSOLE_INDEX=y
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CONFIG_DM_SERIAL=y
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CONFIG_SOC_DEVICE=y
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CONFIG_SOC_DEVICE_TI_K3=y
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CONFIG_SOC_TI=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_TIMER=y
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CONFIG_SPL_TIMER=y
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CONFIG_OMAP_TIMER=y
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CONFIG_LIB_RATIONAL=y
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CONFIG_SPL_LIB_RATIONAL=y
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