b57363a2b9
Drop SoC specific TEXT_BASE and use a common TEXT_BASE for all SoCs. Move the common TEXT_BASE to 8 MiB offset from start of DRAM to help support RAM boot from maskrom introduced in next patch. RAM boot from maskrom mode will expect the FIT payload to be located at 2 MiB offset from start or DRAM. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Arnaud Patard <arnaud.patard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
24 lines
408 B
Plaintext
24 lines
408 B
Plaintext
if ROCKCHIP_RK3308
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config TARGET_EVB_RK3308
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bool "EVB_RK3308"
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select BOARD_LATE_INIT
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config TARGET_ROC_RK3308_CC
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bool "Firefly roc-rk3308-cc"
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select BOARD_LATE_INIT
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config ROCKCHIP_BOOT_MODE_REG
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default 0xff000500
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config ROCKCHIP_STIMER_BASE
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default 0xff1b00a0
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config SYS_SOC
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default "rk3308"
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source "board/rockchip/evb_rk3308/Kconfig"
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source "board/firefly/firefly-rk3308/Kconfig"
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endif
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