73159af02d
Include the FDT for Radxa ROCK 5T in the FIT, in addition to those for 5B and 5B+, and add board selection code to load the 5T FDT when the DRAM type is LPDDR5 and ADC channel 5 value is close to 1016. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
81 lines
1.6 KiB
C
81 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2023-2024 Collabora Ltd.
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*/
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#include <adc.h>
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#include <env.h>
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#include <fdtdec.h>
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#include <fdt_support.h>
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#include <asm/arch-rockchip/sdram.h>
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#include <linux/errno.h>
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#define PMU1GRF_BASE 0xfd58a000
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#define OS_REG2_REG 0x208
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#define HW_ID_CHANNEL 5
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struct board_model {
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unsigned int dram;
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unsigned int low;
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unsigned int high;
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const char *fdtfile;
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};
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static const struct board_model board_models[] = {
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{ LPDDR5, 926, 1106, "rockchip/rk3588-rock-5t.dtb" },
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{ LPDDR5, 4005, 4185, "rockchip/rk3588-rock-5b-plus.dtb" },
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};
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static const struct board_model *get_board_model(void)
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{
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unsigned int val, dram_type;
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int i, ret;
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dram_type = rockchip_sdram_type(PMU1GRF_BASE + OS_REG2_REG);
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ret = adc_channel_single_shot("adc@fec10000", HW_ID_CHANNEL, &val);
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if (ret)
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return NULL;
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for (i = 0; i < ARRAY_SIZE(board_models); i++) {
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unsigned int dram = board_models[i].dram;
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unsigned int min = board_models[i].low;
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unsigned int max = board_models[i].high;
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if (dram == dram_type && min <= val && val <= max)
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return &board_models[i];
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}
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return NULL;
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}
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int rk_board_late_init(void)
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{
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const struct board_model *model = get_board_model();
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if (model)
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env_set("fdtfile", model->fdtfile);
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return 0;
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}
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int board_fit_config_name_match(const char *name)
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{
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const struct board_model *model = get_board_model();
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if (model && !strcmp(name, model->fdtfile))
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return 0;
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return -EINVAL;
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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if (IS_ENABLED(CONFIG_TYPEC_FUSB302))
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fdt_status_okay_by_compatible(blob, "fcs,fusb302");
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return 0;
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}
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#endif
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