9936724aa9
i.MX95 B0 uses image container format v2 and needs DUMMY_DDR so that update imximage.cfg and container.cfg for it. Signed-off-by: Alice Guo <alice.guo@nxp.com>
189 lines
2.4 KiB
Plaintext
189 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2025 NXP
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*/
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/ {
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binman {
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multiple-images;
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m33-oei-ddrfw {
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pad-byte = <0x00>;
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align-size = <0x8>;
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filename = "m33-oei-ddrfw.bin";
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oei-m33-ddr {
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align-size = <0x4>;
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filename = "oei-m33-ddr.bin";
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type = "blob-ext";
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};
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imx-lpddr {
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type = "nxp-header-ddrfw";
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imx-lpddr-imem {
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filename = "lpddr5_imem_v202409.bin";
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type = "blob-ext";
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};
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imx-lpddr-dmem {
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filename = "lpddr5_dmem_v202409.bin";
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type = "blob-ext";
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};
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};
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imx-lpddr-qb {
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type = "nxp-header-ddrfw";
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imx-lpddr-imem-qb {
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filename = "lpddr5_imem_qb_v202409.bin";
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type = "blob-ext";
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};
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imx-lpddr-dmem-qb {
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filename = "lpddr5_dmem_qb_v202409.bin";
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type = "blob-ext";
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};
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};
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};
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imx-boot {
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filename = "flash.bin";
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pad-byte = <0x00>;
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spl {
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align = <0x400>;
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align-size = <0x400>;
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type = "mkimage";
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args = "-n spl/u-boot-spl.cfgout -T imx8image";
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};
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u-boot {
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type = "mkimage";
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args = "-n u-boot-container.cfgout -T imx8image";
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};
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};
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};
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};
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&A55_0 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_1 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_2 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_3 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_4 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_5 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&aips1 {
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bootph-all;
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};
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&aips2 {
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bootph-all;
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};
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&aips3 {
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bootph-pre-ram;
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};
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&clk_ext1 {
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bootph-all;
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};
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&elemu1 {
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bootph-all;
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status = "okay";
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};
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&elemu3 {
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bootph-all;
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status = "okay";
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};
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&{/firmware} {
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bootph-all;
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};
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&{/firmware/scmi} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@11} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@13} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@14} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@19} {
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bootph-all;
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};
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&gpio2 {
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bootph-pre-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&gpio5 {
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bootph-pre-ram;
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};
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&mu2 {
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bootph-all;
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};
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&osc_24m {
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bootph-all;
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};
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&{/soc} {
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bootph-all;
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};
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&sram0 {
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bootph-all;
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};
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&scmi_buf0 {
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reg = <0x0 0x400>;
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bootph-all;
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};
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&scmi_buf1 {
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bootph-all;
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};
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