hwmv2: move imx8m soc for a-core to V2

Port NXP imx8m serial SoC to hwm V2, it includes imx8mm, imx8mn and
imx8mp.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>

soc/nxp/imx/imx8m/CMakeLists.txt

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_SOC_MIMX8ML8_A53 OR CONFIG_SOC_MIMX8MM6_A53 OR CONFIG_SOC_MIMX8MN6_A53)
+  zephyr_include_directories(.)
+  zephyr_include_directories(a53)
+
+  zephyr_sources_ifdef(CONFIG_ARM_MMU a53/mmu_regions.c)
+
+  set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "")
+endif()

soc/nxp/imx/imx8m/Kconfig

@@ -0,0 +1,29 @@
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_MIMX8MM6_A53
+	select ARM64
+	select CPU_CORTEX_A53
+	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
+	select HAS_MCUX if CLOCK_CONTROL
+	select HAS_MCUX_CCM if CLOCK_CONTROL
+	select HAS_MCUX_IOMUXC if PINCTRL
+
+config SOC_MIMX8ML8_A53
+	select ARM64
+	select CPU_CORTEX_A53
+	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
+	select HAS_MCUX if CLOCK_CONTROL
+	select HAS_MCUX_CCM if CLOCK_CONTROL
+	select HAS_MCUX_IOMUXC if PINCTRL
+
+config SOC_MIMX8MN6_A53
+	select ARM64
+	select CPU_CORTEX_A53
+	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
+	select HAS_MCUX if CLOCK_CONTROL
+	select HAS_MCUX_CCM if CLOCK_CONTROL
+	select HAS_MCUX_IOMUXC if PINCTRL
+
+config MCUX_CORE_SUFFIX
+	default "_ca53" if SOC_MIMX8MM6_A53 || SOC_MIMX8MN6_A53 || SOC_MIMX8ML8_A53

soc/nxp/imx/imx8m/Kconfig.defconfig

@@ -0,0 +1,8 @@
+# Copyright 2020-2022,2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_IMX8M
+
+rsource "Kconfig.defconfig.*"
+
+endif # SOC_SERIES_MIMX8M

soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm.a53

@@ -1,10 +1,7 @@
-# Copyright 2020-2023 NXP
+# Copyright 2020-2024 NXP
 # SPDX-License-Identifier: Apache-2.0
 
-if SOC_MIMX8MM_A53
-
-config SOC
-	default "mimx8mm6_ca53"
+if SOC_MIMX8MM6_A53
 
 # Workaround for not being able to have commas in macro arguments
 DT_CHOSEN_Z_FLASH := zephyr,flash

soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn.a53

@@ -1,10 +1,7 @@
-# Copyright 2022-2023 NXP
+# Copyright 2022-2024 NXP
 # SPDX-License-Identifier: Apache-2.0
 
-if SOC_MIMX8MN_A53
-
-config SOC
-	default "mimx8mn6_ca53"
+if SOC_MIMX8MN6_A53
 
 # Workaround for not being able to have commas in macro arguments
 DT_CHOSEN_Z_FLASH := zephyr,flash

soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mp.a53

@@ -1,10 +1,7 @@
 # Copyright 2021-2023 NXP
 # SPDX-License-Identifier: Apache-2.0
 
-if SOC_MIMX8MP_A53
-
-config SOC
-	default "mimx8ml8_ca53"
+if SOC_MIMX8ML8_A53
 
 # Workaround for not being able to have commas in macro arguments
 DT_CHOSEN_Z_FLASH := zephyr,flash

soc/nxp/imx/imx8m/Kconfig.soc

@@ -0,0 +1,74 @@
+# Copyright 2020-2022,2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_IMX8M
+	bool
+	select SOC_FAMILY_IMX
+
+config SOC_MIMX8MM6
+	bool
+	select SOC_SERIES_IMX8M
+
+config SOC_MIMX8MM6_A53
+	bool
+	select SOC_MIMX8MM6
+	help
+	  NXP i.MX8MM A53
+
+config SOC_MIMX8ML8
+	bool
+	select SOC_SERIES_IMX8M
+
+config SOC_MIMX8ML8_A53
+	bool
+	select SOC_MIMX8ML8
+	help
+	  NXP i.MX8MP A53
+
+config SOC_MIMX8MN6
+	bool
+	select SOC_SERIES_IMX8M
+
+config SOC_MIMX8MN6_A53
+	bool
+	select SOC_MIMX8MN6
+	help
+	  NXP i.MX8MN A53
+
+config SOC_PART_NUMBER_MIMX8ML8DVNLZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MM6DVTLZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MM6CVTKZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MN6DVTJZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MN6DUCJZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MN6CVTIZ
+	bool
+
+config SOC_PART_NUMBER_MIMX8MN6CUCIZ
+	bool
+
+config SOC_PART_NUMBER
+	default "MIMX8ML8DVNLZ" if SOC_PART_NUMBER_MIMX8ML8DVNLZ
+	default "MIMX8MM6DVTLZ" if SOC_PART_NUMBER_MIMX8MM6DVTLZ
+	default "MIMX8MM6CVTKZ" if SOC_PART_NUMBER_MIMX8MM6CVTKZ
+	default "MIMX8MN6DVTJZ" if SOC_PART_NUMBER_MIMX8MN6DVTJZ
+	default "MIMX8MN6DUCJZ" if SOC_PART_NUMBER_MIMX8MN6DUCJZ
+	default "MIMX8MN6CVTIZ" if SOC_PART_NUMBER_MIMX8MN6CVTIZ
+	default "MIMX8MN6CUCIZ" if SOC_PART_NUMBER_MIMX8MN6CUCIZ
+
+config SOC
+	default "mimx8mm6" if SOC_MIMX8MM6
+	default "mimx8mn6" if SOC_MIMX8MN6
+	default "mimx8ml8" if SOC_MIMX8ML8
+
+config SOC_SERIES
+	default "imx8m" if SOC_SERIES_IMX8M

soc/soc_legacy/arm64/nxp_imx/CMakeLists.txt

@@ -1,7 +0,0 @@
-#
-# Copyright (c) 2022, NXP
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-
-add_subdirectory(${SOC_SERIES})

soc/soc_legacy/arm64/nxp_imx/Kconfig

@@ -1,16 +0,0 @@
-# Copyright (c) 2017-2020, NXP
-# SPDX-License-Identifier: Apache-2.0
-
-config SOC_FAMILY_IMX
-	bool
-	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
-
-if SOC_FAMILY_IMX
-
-config SOC_FAMILY
-	string
-	default "nxp_imx"
-
-source "soc/soc_legacy/arm64/nxp_imx/*/Kconfig.soc"
-
-endif # SOC_FAMILY_IMX

soc/soc_legacy/arm64/nxp_imx/Kconfig.defconfig

@@ -1,4 +0,0 @@
-# Copyright (c) 2017, NXP
-# SPDX-License-Identifier: Apache-2.0
-
-source "soc/soc_legacy/arm64/nxp_imx/*/Kconfig.defconfig.series"

soc/soc_legacy/arm64/nxp_imx/Kconfig.soc

@@ -1,4 +0,0 @@
-# Copyright (c) 2017, NXP
-# SPDX-License-Identifier: Apache-2.0
-
-source "soc/soc_legacy/arm64/nxp_imx/*/Kconfig.series"

soc/soc_legacy/arm64/nxp_imx/mimx8m/CMakeLists.txt

@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-zephyr_include_directories(.)
-
-zephyr_sources_ifdef(CONFIG_ARM_MMU mmu_regions.c)
-
-set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "")

soc/soc_legacy/arm64/nxp_imx/mimx8m/Kconfig.defconfig.series

@@ -1,11 +0,0 @@
-# Copyright 2020-2022 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-if SOC_SERIES_MIMX8M_A53
-
-config SOC_SERIES
-	default "mimx8m"
-
-source "soc/soc_legacy/arm64/nxp_imx/mimx8m/Kconfig.defconfig.mimx8m*"
-
-endif # SOC_SERIES_MIMX8M_A53

soc/soc_legacy/arm64/nxp_imx/mimx8m/Kconfig.series

@@ -1,9 +0,0 @@
-# Copyright 2020-2022 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-config SOC_SERIES_MIMX8M_A53
-	bool "NXP i.MX8M A53 Core Series"
-	select ARM64
-	select SOC_FAMILY_IMX
-	help
-	  Enable support for i.MX8M A53 Series.

soc/soc_legacy/arm64/nxp_imx/mimx8m/Kconfig.soc

@@ -1,93 +0,0 @@
-# Copyright 2020-2022 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-choice
-prompt "NXP i.MX8M A53 Selection"
-depends on SOC_SERIES_MIMX8M_A53
-
-config SOC_MIMX8MM_A53
-	bool "NXP i.MX8MM A53"
-	select ARM64
-	select CPU_CORTEX_A53
-	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
-	select HAS_MCUX if CLOCK_CONTROL
-	select HAS_MCUX_CCM if CLOCK_CONTROL
-	select HAS_MCUX_IOMUXC if PINCTRL
-
-config SOC_MIMX8MP_A53
-	bool "NXP i.MX8MP A53"
-	select ARM64
-	select CPU_CORTEX_A53
-	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
-	select HAS_MCUX if CLOCK_CONTROL
-	select HAS_MCUX_CCM if CLOCK_CONTROL
-	select HAS_MCUX_IOMUXC if PINCTRL
-
-config SOC_MIMX8MN_A53
-	bool "NXP i.MX8MN A53"
-	select ARM64
-	select CPU_CORTEX_A53
-	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
-	select HAS_MCUX if CLOCK_CONTROL
-	select HAS_MCUX_CCM if CLOCK_CONTROL
-	select HAS_MCUX_IOMUXC if PINCTRL
-
-endchoice
-
-config SOC_PART_NUMBER_MIMX8ML8DVNLZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MP_A53
-	string
-	default "MIMX8ML8DVNLZ_ca53" if  SOC_PART_NUMBER_MIMX8ML8DVNLZ
-	help
-	  This string holds the full part number of the SoC. It is a hidden option
-	  that you should not set directly. The part number selection choice defines
-	  the default value for this string.
-
-config SOC_PART_NUMBER_MIMX8MM6DVTLZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MM6CVTKZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MM_A53
-	string
-	default "MIMX8MM6DVTLZ_ca53" if  SOC_PART_NUMBER_MIMX8MM6DVTLZ
-	default "MIMX8MM6CVTKZ_ca53" if  SOC_PART_NUMBER_MIMX8MM6CVTKZ
-	help
-	  This string holds the full part number of the SoC. It is a hidden option
-	  that you should not set directly. The part number selection choice defines
-	  the default value for this string.
-
-if SOC_MIMX8MN_A53
-
-config SOC_PART_NUMBER_MIMX8MN6DVTJZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MN6DUCJZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MN6CVTIZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MN6CUCIZ
-	bool
-
-config SOC_PART_NUMBER_MIMX8MN_A53
-	string
-	default "MIMX8MN6DVTJZ_ca53" if  SOC_PART_NUMBER_MIMX8MN6DVTJZ
-	default "MIMX8MN6DUCJZ_ca53" if  SOC_PART_NUMBER_MIMX8MN6DUCJZ
-	default "MIMX8MN6CVTIZ_ca53" if  SOC_PART_NUMBER_MIMX8MN6CVTIZ
-	default "MIMX8MN6CUCIZ_ca53" if  SOC_PART_NUMBER_MIMX8MN6CUCIZ
-	help
-	  This string holds the full part number of the SoC. It is a hidden option
-	  that you should not set directly. The part number selection choice defines
-	  the default value for this string.
-
-endif # SOC_MIMX8MN_A53
-
-config SOC_PART_NUMBER
-	default SOC_PART_NUMBER_MIMX8MP_A53 if SOC_MIMX8MP_A53
-	default SOC_PART_NUMBER_MIMX8MM_A53 if SOC_MIMX8MM_A53
-	default SOC_PART_NUMBER_MIMX8MN_A53 if SOC_MIMX8MN_A53