soc: efinix_sapphire: Port to HWMv2

Ports the SoC configuration to hardware model version 2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-02-14 08:16:35 +00:00
parent 6d466429ed
commit 359133d725
5 changed files with 12 additions and 4 deletions
--- a/soc/soc_legacy/riscv/efinix_sapphire/CMakeLists.txt
+++ b/soc/soc_legacy/riscv/efinix_sapphire/CMakeLists.txt
--- a/soc/soc_legacy/riscv/efinix_sapphire/Kconfig.soc
+++ b/soc/soc_legacy/riscv/efinix_sapphire/Kconfig.soc
@@ -2,7 +2,6 @@
 # SPDX-License-Identifier: Apache-2.0

 config SOC_EFINIX_SAPPHIRE
-	bool "Efinix Sapphire VexRiscv system implementation"
 	select ATOMIC_OPERATIONS_BUILTIN
 	select INCLUDE_RESET_VECTOR
 	select RISCV_ISA_RV32I
--- a/soc/soc_legacy/riscv/efinix_sapphire/Kconfig.defconfig
+++ b/soc/soc_legacy/riscv/efinix_sapphire/Kconfig.defconfig
@@ -3,9 +3,6 @@

 if SOC_EFINIX_SAPPHIRE

-config SOC
-	default "efinix_sapphire"
-
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 100000000

--- a/soc/efinix/sapphire/Kconfig.soc
+++ b/soc/efinix/sapphire/Kconfig.soc
@@ -0,0 +1,10 @@
+# Copyright (c) 2023 Efinix Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_EFINIX_SAPPHIRE
+	bool
+	help
+	  Efinix Sapphire VexRiscv system implementation
+
+config SOC
+	default "efinix_sapphire" if SOC_EFINIX_SAPPHIRE
--- a/soc/efinix/sapphire/soc.yml
+++ b/soc/efinix/sapphire/soc.yml
@@ -0,0 +1,2 @@
+socs:
+- name: efinix_sapphire