arch: riscv: use RISCV_ISA_RV64I to set 64BIT

use CONFIG_RISCV_ISA_RV64I to set CONFIG_64BIT. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-10-21 10:44:22 +02:00
parent b487d53d81
commit 3be1b9ca7a
6 changed files with 1 additions and 8 deletions
--- a/arch/riscv/Kconfig.isa
+++ b/arch/riscv/Kconfig.isa
@@ -13,7 +13,7 @@ config RISCV_ISA_RV32E

 config RISCV_ISA_RV64I
 	bool
-	default y if 64BIT
+	select 64BIT
 	help
 	  RV64I Base Integer Instruction Set - 64bit

--- a/soc/andestech/ae350/Kconfig
+++ b/soc/andestech/ae350/Kconfig
@@ -49,7 +49,6 @@ config RV32E_CPU
 config RV64I_CPU
 	bool "RISCV64 CPU ISA"
 	select RISCV_ISA_RV64I
-	select 64BIT

 endchoice

--- a/soc/qemu/virt_riscv/qemu_virt_riscv64/Kconfig
+++ b/soc/qemu/virt_riscv/qemu_virt_riscv64/Kconfig
@@ -2,7 +2,6 @@
 # SPDX-License-Identifier: Apache-2.0

 config SOC_QEMU_VIRT_RISCV64
-	select 64BIT
 	select CPU_HAS_FPU_DOUBLE_PRECISION
 	select RISCV_ISA_RV64I
 	select RISCV_ISA_EXT_ZICSR
--- a/soc/sifive/sifive_freedom/fu500/Kconfig
+++ b/soc/sifive/sifive_freedom/fu500/Kconfig
@@ -5,8 +5,6 @@
 config SOC_SERIES_SIFIVE_FREEDOM_FU500
 	bool

-	select 64BIT
-
 	# RISC-V options
 	select RISCV
 	select RISCV_PRIVILEGED
--- a/soc/sifive/sifive_freedom/fu700/Kconfig
+++ b/soc/sifive/sifive_freedom/fu700/Kconfig
@@ -4,8 +4,6 @@
 config SOC_SERIES_SIFIVE_FREEDOM_FU700
 	bool

-	select 64BIT
-
 	# RISC-V options
 	select RISCV
 	select RISCV_PRIVILEGED
--- a/soc/starfive/jh71xx/Kconfig
+++ b/soc/starfive/jh71xx/Kconfig
@@ -25,4 +25,3 @@ config SOC_JH7110
 	select RISCV_ISA_EXT_C
 	select RISCV_ISA_EXT_ZICSR
 	select RISCV_ISA_EXT_ZIFENCEI
-	select 64BIT