boards: riscv: xiao_esp32c3: Convert to v2

Converts the board to hwmv2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-02-19 13:47:40 +00:00
parent fc7c6a060b
commit 3c670e4e53
15 changed files with 13 additions and 20 deletions
--- a/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.board
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.board
@@ -1,10 +0,0 @@
-# Copyright 2022 Google LLC
-# SPDX-License-Identifier: Apache-2.0
-
-config BOARD_XIAO_ESP32C3
-	bool "XIAO ESP32C3 Board"
-	depends on SOC_SERIES_ESP32C3
-
-choice SOC_PART_NUMBER
-	default SOC_ESP32C3_FX4
-endchoice
--- a/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.defconfig
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.defconfig
@@ -1,10 +1,6 @@
 # Copyright 2022 Google LLC
 # SPDX-License-Identifier: Apache-2.0

-config BOARD
-	default "xiao_esp32c3"
-	depends on BOARD_XIAO_ESP32C3
-
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
 	default 65535 if WIFI && BT
--- a/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.sysbuild
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/Kconfig.sysbuild
--- a/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3
+++ b/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3
@@ -0,0 +1,5 @@
+# Copyright 2022 Google LLC
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XIAO_ESP32C3
+	select SOC_ESP32C3_FX4
--- a/boards/boards_legacy/riscv/xiao_esp32c3/board.cmake
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/board.cmake
--- a/boards/seeed/xiao_esp32c3/board.yml
+++ b/boards/seeed/xiao_esp32c3/board.yml
@@ -0,0 +1,5 @@
+board:
+  name: xiao_esp32c3
+  vendor: seeed
+  socs:
+  - name: esp32c3
--- a/boards/boards_legacy/riscv/xiao_esp32c3/doc/img/xiao_esp32c.jpg
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/doc/img/xiao_esp32c.jpg
--- a/boards/boards_legacy/riscv/xiao_esp32c3/doc/img/xiao_esp32c3_pinout.jpg
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/doc/img/xiao_esp32c3_pinout.jpg
--- a/boards/boards_legacy/riscv/xiao_esp32c3/doc/index.rst
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/doc/index.rst
@@ -132,9 +132,9 @@ Zephyr build. Output is structured by the domain subdirectories:

  build/
  ├── hello_world
-  │   └── zephyr
-  │       ├── zephyr.elf
-  │       └── zephyr.bin
+  │   └── zephyr
+  │       ├── zephyr.elf
+  │       └── zephyr.bin
  ├── mcuboot
  │    └── zephyr
  │       ├── zephyr.elf
--- a/boards/boards_legacy/riscv/xiao_esp32c3/seeed_xiao_connector.dtsi
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/seeed_xiao_connector.dtsi
--- a/boards/boards_legacy/riscv/xiao_esp32c3/support/openocd.cfg
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/support/openocd.cfg
--- a/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3-pinctrl.dtsi
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3-pinctrl.dtsi
--- a/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3.dts
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3.dts
--- a/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3.yaml
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3.yaml
--- a/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3_defconfig
+++ b/boards/boards_legacy/riscv/xiao_esp32c3/xiao_esp32c3_defconfig
@@ -1,8 +1,5 @@
 # SPDX-License-Identifier: Apache-2.0

-CONFIG_BOARD_XIAO_ESP32C3=y
-CONFIG_SOC_SERIES_ESP32C3=y
-
 CONFIG_MAIN_STACK_SIZE=2048

 CONFIG_CONSOLE=y