hwmv2: move imx8mm EVK board to V2

Port EVK board for NXP imx8mm to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>

boards/boards_legacy/arm64/mimx8mm_evk/Kconfig.board

@@ -1,7 +0,0 @@
-# Copyright 2021-2022 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-config BOARD_MIMX8MM_EVK_A53
-	bool "NXP i.MX8M Mini EVK A53"
-	depends on SOC_SERIES_MIMX8M_A53
-	select SOC_PART_NUMBER_MIMX8MM6DVTLZ

boards/boards_legacy/arm64/mimx8mm_evk/Kconfig.defconfig

@@ -1,9 +0,0 @@
-# Copyright 2020-2022 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-if BOARD_MIMX8MM_EVK_A53
-
-config BOARD
-	default "mimx8mm_evk_a53"
-
-endif # BOARD_MIMX8MM_EVK_A53

boards/nxp/imx8mm_evk/Kconfig.imx8mm_evk

@@ -0,0 +1,6 @@
+# Copyright 2021-2022,2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_IMX8MM_EVK
+	select SOC_MIMX8MM6_A53 if BOARD_IMX8MM_EVK_MIMX8MM6_A53 || BOARD_IMX8MM_EVK_MIMX8MM6_A53_SMP
+	select SOC_PART_NUMBER_MIMX8MM6DVTLZ if BOARD_IMX8MM_EVK_MIMX8MM6_A53 || BOARD_IMX8MM_EVK_MIMX8MM6_A53_SMP

boards/nxp/imx8mm_evk/board.yml

@@ -0,0 +1,8 @@
+board:
+  name: imx8mm_evk
+  vendor: nxp
+  socs:
+  - name: mimx8mm6
+    variants:
+    - name: smp
+      cpucluster: a53

boards/nxp/imx8mm_evk/doc/index.rst

@@ -45,7 +45,7 @@ More information about the board can be found at the
 Supported Features
 ==================
 
-The Zephyr mimx8mm_evk_a53 board configuration supports the following hardware
+The Zephyr imx8mm_evk board for Cortex-A53 configuration supports the following hardware
 features:
 
 +-----------+------------+-------------------------------------+
@@ -97,7 +97,7 @@ for example, with the :zephyr:code-sample:`synchronization` sample:
 .. zephyr-app-commands::
    :zephyr-app: samples/synchronization
    :host-os: unix
-   :board: mimx8mm_evk_a53
+   :board: imx8mm_evk/mimx8mm6/a53
    :goals: run
 
 This will build an image with the synchronization sample app, boot it and

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.dts

@@ -7,7 +7,7 @@
 /dts-v1/;
 
 #include <nxp/nxp_mimx8mm_a53.dtsi>
-#include "mimx8mm_evk-pinctrl.dtsi"
+#include "imx8mm_evk-pinctrl.dtsi"
 
 / {
 	model = "NXP i.MX8MM A53";

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.yaml

@@ -1,4 +1,10 @@
-identifier: mimx8mm_evk_a53
+#
+# Copyright 2024 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: imx8mm_evk/mimx8mm6/a53
 name: NXP i.MX8M Mini EVK A53
 type: mcu
 arch: arm64
@@ -10,4 +16,4 @@ testing:
   ignore_tags:
     - net
     - bluetooth
-vendor: fsl
+vendor: nxp

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_defconfig

@@ -11,11 +11,6 @@ CONFIG_CACHE_MANAGEMENT=y
 CONFIG_DCACHE_LINE_SIZE_DETECT=y
 CONFIG_ICACHE_LINE_SIZE_DETECT=y
 
-# Platform Configuration
-CONFIG_SOC_SERIES_MIMX8M_A53=y
-CONFIG_SOC_MIMX8MM_A53=y
-CONFIG_BOARD_MIMX8MM_EVK_A53=y
-
 # Zephyr Kernel Configuration
 CONFIG_XIP=n
 

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.dts

@@ -7,7 +7,7 @@
 /dts-v1/;
 
 #include <nxp/nxp_mimx8mm_a53.dtsi>
-#include "mimx8mm_evk-pinctrl.dtsi"
+#include "imx8mm_evk-pinctrl.dtsi"
 
 / {
 	model = "NXP i.MX8MM A53";

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.yaml

@@ -1,4 +1,10 @@
-identifier: mimx8mm_evk_a53_smp
+#
+# Copyright 2024 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: imx8mm_evk/mimx8mm6/a53/smp
 name: NXP i.MX8M Mini EVK A53 with SMP kernel
 type: mcu
 arch: arm64
@@ -12,4 +18,4 @@ testing:
   ignore_tags:
     - net
     - bluetooth
-vendor: fsl
+vendor: nxp

boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp_defconfig

@@ -11,11 +11,6 @@ CONFIG_CACHE_MANAGEMENT=y
 CONFIG_DCACHE_LINE_SIZE_DETECT=y
 CONFIG_ICACHE_LINE_SIZE_DETECT=y
 
-# Platform Configuration
-CONFIG_SOC_SERIES_MIMX8M_A53=y
-CONFIG_SOC_MIMX8MM_A53=y
-CONFIG_BOARD_MIMX8MM_EVK_A53=y
-
 # Zephyr Kernel Configuration
 CONFIG_XIP=n