soc: riscv_renode_virtual: Port to HWMv2

Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2024-02-28 15:18:17 +00:00
committed by Carles Cufi
parent cc5c2fb0c7
commit 484b7f1996
5 changed files with 15 additions and 7 deletions

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@@ -1,8 +1,7 @@
# Copyright (c) 2023 Meta
# SPDX-License-Identifier: Apache-2.0
config SOC_RISCV32_VIRTUAL_RENODE
bool "Renode RISCV32 Virtual system implementation"
config SOC_RISCV_VIRTUAL_RENODE
select RISCV
select RISCV_PRIVILEGED
select ATOMIC_OPERATIONS_BUILTIN

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@@ -1,10 +1,7 @@
# Copyright (c) 2023 Meta
# SPDX-License-Identifier: Apache-2.0
if SOC_RISCV32_VIRTUAL_RENODE
config SOC
default "renode_virt"
if SOC_RISCV_VIRTUAL_RENODE
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 4000000
@@ -39,4 +36,4 @@ config MAX_IRQ_PER_AGGREGATOR
config NUM_IRQS
default 2058
endif # SOC_RISCV32_VIRTUAL_RENODE
endif # SOC_RISCV_VIRTUAL_RENODE

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@@ -0,0 +1,10 @@
# Copyright (c) 2023 Meta
# SPDX-License-Identifier: Apache-2.0
config SOC_RISCV_VIRTUAL_RENODE
bool
help
Renode RISCV32 Virtual system implementation
config SOC
default "riscv_virtual_renode" if SOC_RISCV_VIRTUAL_RENODE

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@@ -0,0 +1,2 @@
socs:
- name: riscv_virtual_renode