soc: st: stm32: Migrate STM32G0 series

Port STM32G0 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>

soc/soc_legacy/arm/st_stm32/stm32g0/Kconfig.soc

@@ -1,48 +0,0 @@
-# STMicroelectronics STM32G0 MCU line
-
-# Copyright (c) 2019 Philippe Retornaz <philippe@shapescale.com>
-# Copyright (c) 2019 STMicroelectronics
-# Copyright (c) 2020 Thomas Stranger
-# SPDX-License-Identifier: Apache-2.0
-
-choice
-	prompt "STM32G0x MCU Selection"
-	depends on SOC_SERIES_STM32G0X
-
-config SOC_STM32G030XX
-	bool "STM32G030XX"
-
-config SOC_STM32G031XX
-	bool "STM32G031XX"
-
-config SOC_STM32G041XX
-	bool "STM32G041XX"
-
-config SOC_STM32G050XX
-	bool "STM32G050XX"
-
-config SOC_STM32G051XX
-	bool "STM32G051XX"
-
-config SOC_STM32G061XX
-	bool "STM32G061XX"
-
-config SOC_STM32G070XX
-	bool "STM32G070XX"
-
-config SOC_STM32G071XX
-	bool "STM32G071XX"
-
-config SOC_STM32G081XX
-	bool "STM32G081XX"
-
-config SOC_STM32G0B0XX
-	bool "STM32G0B0XX"
-
-config SOC_STM32G0B1XX
-	bool "STM32G0B1XX"
-
-config SOC_STM32G0C1XX
-	bool "STM32G0C1XX"
-
-endchoice

soc/st/stm32/soc.yml

@@ -56,6 +56,20 @@ family:
     - name: stm32f765xx
     - name: stm32f767xx
     - name: stm32f769xx
+  - name: stm32g0x
+    socs:
+    - name: stm32g030xx
+    - name: stm32g031xx
+    - name: stm32g041xx
+    - name: stm32g050xx
+    - name: stm32g051xx
+    - name: stm32g061xx
+    - name: stm32g070xx
+    - name: stm32g071xx
+    - name: stm32g081xx
+    - name: stm32g0b0xx
+    - name: stm32g0b1xx
+    - name: stm32g0c1xx
   - name: stm32l1x
     socs:
     - name: stm32l151xb

soc/st/stm32/stm32g0/CMakeLists.txt

@@ -10,4 +10,6 @@ zephyr_sources_ifdef(CONFIG_PM
   power.c
   )
 
+zephyr_include_directories(.)
+
 set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

soc/st/stm32/stm32g0/Kconfig

@@ -5,14 +5,10 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config SOC_SERIES_STM32G0X
-	bool "STM32G0x Series MCU"
 	select ARM
 	select CPU_CORTEX_M0PLUS
 	select CPU_CORTEX_M_HAS_VTOR
 	select CPU_HAS_ARM_MPU
-	select SOC_FAMILY_STM32
 	select HAS_STM32CUBE
 	select CPU_CORTEX_M_HAS_SYSTICK
 	select HAS_PM
-	help
-	  Enable support for STM32G0 MCU series

soc/st/stm32/stm32g0/Kconfig.defconfig

@@ -7,9 +7,6 @@
 
 if SOC_SERIES_STM32G0X
 
-source "soc/soc_legacy/arm/st_stm32/stm32g0/Kconfig.defconfig.stm32g0*"
-
-config SOC_SERIES
-	default "stm32g0"
+rsource "Kconfig.defconfig.stm32g0*"
 
 endif # SOC_SERIES_STM32G0X

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g030xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G030XX
 
-config SOC
-	default "stm32g030xx"
-
 config NUM_IRQS
 	default 29
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g031xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G031XX
 
-config SOC
-	default "stm32g031xx"
-
 config NUM_IRQS
 	default 30
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g041xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G041XX
 
-config SOC
-	default "stm32g041xx"
-
 config NUM_IRQS
 	default 32
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g050xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G050XX
 
-config SOC
-	default "stm32g050xx"
-
 config NUM_IRQS
 	default 29
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g051xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G051XX
 
-config SOC
-	default "stm32g051xx"
-
 config NUM_IRQS
 	default 30
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g061xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G061XX
 
-config SOC
-	default "stm32g061xx"
-
 config NUM_IRQS
 	default 32
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g070xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G070XX
 
-config SOC
-	default "stm32g070xx"
-
 config NUM_IRQS
 	default 30
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g071xx

@@ -6,9 +6,6 @@
 
 if SOC_STM32G071XX
 
-config SOC
-	default "stm32g071xx"
-
 config NUM_IRQS
 	default 31
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g081xx

@@ -6,9 +6,6 @@
 
 if SOC_STM32G081XX
 
-config SOC
-	default "stm32g081xx"
-
 config NUM_IRQS
 	default 32
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g0b0xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G0B0XX
 
-config SOC
-	default "stm32g0b0xx"
-
 config NUM_IRQS
 	default 30
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g0b1xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G0B1XX
 
-config SOC
-	default "stm32g0b1xx"
-
 config NUM_IRQS
 	default 31
 

soc/st/stm32/stm32g0/Kconfig.defconfig.stm32g0c1xx

@@ -5,9 +5,6 @@
 
 if SOC_STM32G0C1XX
 
-config SOC
-	default "stm32g0c1xx"
-
 config NUM_IRQS
 	default 32
 

soc/st/stm32/stm32g0/Kconfig.soc

@@ -0,0 +1,75 @@
+# STMicroelectronics STM32G0 MCU line
+
+# Copyright (c) 2019 Philippe Retornaz <philippe@shapescale.com>
+# Copyright (c) 2019 STMicroelectronics
+# Copyright (c) 2020 Thomas Stranger
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STM32G0X
+	bool
+	select SOC_FAMILY_STM32
+
+config SOC_SERIES
+	default "stm32g0" if SOC_SERIES_STM32G0X
+
+config SOC_STM32G030XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G031XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G041XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G050XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G051XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G061XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G070XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G071XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G081XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G0B0XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G0B1XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC_STM32G0C1XX
+	bool
+	select SOC_SERIES_STM32G0X
+
+config SOC
+	default "stm32g030xx" if SOC_STM32G030XX
+	default "stm32g031xx" if SOC_STM32G031XX
+	default "stm32g041xx" if SOC_STM32G041XX
+	default "stm32g050xx" if SOC_STM32G050XX
+	default "stm32g051xx" if SOC_STM32G051XX
+	default "stm32g061xx" if SOC_STM32G061XX
+	default "stm32g070xx" if SOC_STM32G070XX
+	default "stm32g071xx" if SOC_STM32G071XX
+	default "stm32g081xx" if SOC_STM32G081XX
+	default "stm32g0b0xx" if SOC_STM32G0B0XX
+	default "stm32g0b1xx" if SOC_STM32G0B1XX
+	default "stm32g0c1xx" if SOC_STM32G0C1XX