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soc: silabs: SOC_FAMILY_* replace SOC_GECKO_SERIES*

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SOC_GECKO_SERIES* is now redundant with SOC_FAMILY_*.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This commit is contained in:
Jérôme Pouiller
2024-02-23 12:11:20 +01:00
committed by Carles Cufi
parent 2fd081ac86
commit 5d07e82485
21 changed files with 12 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
boards/silabs/efr32_radio/Kconfig.defconfig
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@@ -25,7 +25,7 @@ config LOG_BACKEND_SWO_FREQ_HZ
if SOC_GECKO_USE_RAIL
config FPU
default n if SOC_GECKO_SERIES1
default n if SOC_FAMILY_SILABS_S1
default y
endif # SOC_GECKO_USE_RAIL

14
drivers/pinctrl/pinctrl_gecko.c
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@@ -12,7 +12,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
{
USART_TypeDef *base = (USART_TypeDef *)reg;
uint8_t loc;
#ifdef CONFIG_SOC_GECKO_SERIES1
#ifdef CONFIG_SOC_FAMILY_SILABS_S1
LEUART_TypeDef *lebase = (LEUART_TypeDef *)reg;
#else
int usart_num = USART_NUM(base);
@@ -50,7 +50,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
txpin.out);
break;
#ifdef CONFIG_SOC_GECKO_SERIES1
#ifdef CONFIG_SOC_FAMILY_SILABS_S1
case GECKO_FUN_UART_RTS:
pin_config.mode = gpioModePushPull;
pin_config.out = 1;
@@ -100,7 +100,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
lebase->ROUTELOC0 &= ~_LEUART_ROUTELOC0_TXLOC_MASK;
lebase->ROUTELOC0 |= (loc << _LEUART_ROUTELOC0_TXLOC_SHIFT);
break;
#else /* CONFIG_SOC_GECKO_SERIES1 */
#else /* CONFIG_SOC_FAMILY_SILABS_S1 */
case GECKO_FUN_UART_LOC:
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
/* For SOCs with configurable pin_cfg locations (set in SOC Kconfig) */
@@ -156,11 +156,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
}
#endif /* UART_GECKO_HW_FLOW_CONTROL */
break;
#endif /* CONFIG_SOC_GECKO_SERIES1 */
#endif /* CONFIG_SOC_FAMILY_SILABS_S1 */
#endif /* CONFIG_UART_GECKO */
#ifdef CONFIG_SPI_GECKO
#ifdef CONFIG_SOC_GECKO_SERIES1
#ifdef CONFIG_SOC_FAMILY_SILABS_S1
case GECKO_FUN_SPIM_SCK:
pin_config.mode = gpioModePushPull;
pin_config.out = 1;
@@ -241,7 +241,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
base->ROUTELOC0 |= (loc << _USART_ROUTELOC0_CSLOC_SHIFT);
break;
#else /* CONFIG_SOC_GECKO_SERIES1 */
#else /* CONFIG_SOC_FAMILY_SILABS_S1 */
case GECKO_FUN_SPI_SCK:
pin_config.mode = gpioModePushPull;
pin_config.out = 1;
@@ -274,7 +274,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
GPIO_PinModeSet(pin_config.port, pin_config.pin, pin_config.mode,
pin_config.out);
break;
#endif /* CONFIG_SOC_GECKO_SERIES1 */
#endif /* CONFIG_SOC_FAMILY_SILABS_S1 */
#endif /* CONFIG_SPI_GECKO */
default:

2
drivers/serial/Kconfig.gecko
View File

@@ -10,6 +10,6 @@ config UART_GECKO
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select SOC_GECKO_USART
select PINCTRL if SOC_GECKO_SERIES1
select PINCTRL if SOC_FAMILY_SILABS_S1
help
Enable the Gecko uart driver.

2
drivers/timer/Kconfig.gecko
View File

@@ -3,7 +3,7 @@
config GECKO_BURTC_TIMER
bool "SiLabs Gecko BURTC system clock driver"
depends on SOC_GECKO_SERIES2
depends on SOC_FAMILY_SILABS_S2
depends on DT_HAS_SILABS_GECKO_BURTC_ENABLED
select SOC_GECKO_BURTC
select TICKLESS_CAPABLE

23
soc/silabs/Kconfig
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@@ -10,27 +10,6 @@ if SOC_VENDOR_SILABS
rsource "*/*/Kconfig"
config SOC_GECKO_SERIES0
bool
help
Set if we're building for Gecko Series 0 SoC.
This is equivalent of _SILICON_LABS_32B_SERIES_0 definition in HAL
code.
config SOC_GECKO_SERIES1
bool
help
Set if we're building for Gecko Series 1 SoC.
This is equivalent of _SILICON_LABS_32B_SERIES_1 definition in HAL
code.
config SOC_GECKO_SERIES2
bool
help
Set if we're building for Gecko Series 2 SoC.
This is equivalent of _SILICON_LABS_32B_SERIES_2 definition in HAL
code.
config SOC_GECKO_BURTC
bool
help
@@ -139,7 +118,7 @@ if PM
config SOC_GECKO_PM_BACKEND_PMGR
bool
depends on SOC_GECKO_DEV_INIT
default y if SOC_GECKO_SERIES2
default y if SOC_FAMILY_SILABS_S2
help
Implement PM using sl_power_manager service from Gecko SDK

2
soc/silabs/common/pinctrl_soc.h
View File

@@ -15,7 +15,7 @@
#include <stdint.h>
#include <zephyr/devicetree.h>
#if CONFIG_SOC_GECKO_SERIES1
#if CONFIG_SOC_FAMILY_SILABS_S1
#include <zephyr/dt-bindings/pinctrl/gecko-pinctrl-s1.h>
#else
#include <zephyr/dt-bindings/pinctrl/gecko-pinctrl.h>

1
soc/silabs/silabs_s0/efm32hg/Kconfig
View File

@@ -12,4 +12,3 @@ config SOC_SERIES_EFM32HG
select SOC_GECKO_CMU
select SOC_GECKO_GPIO
select HAS_PM
select SOC_GECKO_SERIES0

1
soc/silabs/silabs_s0/efm32wg/Kconfig
View File

@@ -13,4 +13,3 @@ config SOC_SERIES_EFM32WG
select SOC_GECKO_CMU
select SOC_GECKO_GPIO
select HAS_PM
select SOC_GECKO_SERIES0

1
soc/silabs/silabs_s1/efm32gg11b/Kconfig
View File

@@ -16,4 +16,3 @@ config SOC_SERIES_EFM32GG11B
select SOC_GECKO_EMU
select SOC_GECKO_GPIO
select SOC_GECKO_TRNG
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efm32gg12b/Kconfig
View File

@@ -15,4 +15,3 @@ config SOC_SERIES_EFM32GG12B
select SOC_GECKO_EMU
select SOC_GECKO_GPIO
select SOC_GECKO_TRNG
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efm32jg12b/Kconfig
View File

@@ -11,7 +11,6 @@ config SOC_SERIES_EFM32JG12B
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_SERIES1
select SOC_GECKO_CMU
select SOC_GECKO_EMU
select SOC_GECKO_GPIO

1
soc/silabs/silabs_s1/efm32pg12b/Kconfig
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@@ -11,7 +11,6 @@ config SOC_SERIES_EFM32PG12B
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_SERIES1
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU

1
soc/silabs/silabs_s1/efm32pg1b/Kconfig
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@@ -17,4 +17,3 @@ config SOC_SERIES_EFM32PG1B
select SOC_GECKO_EMU
select SOC_GECKO_GPIO
select HAS_PM
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efr32bg13p/Kconfig
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@@ -17,4 +17,3 @@ config SOC_SERIES_EFR32BG13P
select SOC_GECKO_EMU
select SOC_GECKO_GPIO
select HAS_PM
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efr32fg13p/Kconfig
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@@ -18,4 +18,3 @@ config SOC_SERIES_EFR32FG13P
select SOC_GECKO_GPIO
select SOC_GECKO_HAS_ERRATA_RTCC_E201
select HAS_PM
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efr32fg1p/Kconfig
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@@ -18,4 +18,3 @@ config SOC_SERIES_EFR32FG1P
select SOC_GECKO_GPIO
select SOC_GECKO_HAS_ERRATA_RTCC_E201
select HAS_PM
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s1/efr32mg12p/Kconfig
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@@ -19,4 +19,3 @@ config SOC_SERIES_EFR32MG12P
select SOC_GECKO_GPIO
select SOC_GECKO_TRNG
select HAS_PM
select SOC_GECKO_SERIES1

1
soc/silabs/silabs_s2/efr32bg22/Kconfig
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@@ -14,7 +14,6 @@ config SOC_SERIES_EFR32BG22
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_RADIO
select SOC_GECKO_SERIES2
select SOC_GECKO_GPIO
select SOC_GECKO_CMU
select SOC_GECKO_CORE

1
soc/silabs/silabs_s2/efr32bg27/Kconfig
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@@ -14,7 +14,6 @@ config SOC_SERIES_EFR32BG27
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_RADIO
select SOC_GECKO_SERIES2
select SOC_GECKO_CMU
select SOC_GECKO_CORE
select SOC_GECKO_DEV_INIT

1
soc/silabs/silabs_s2/efr32mg21/Kconfig
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@@ -12,7 +12,6 @@ config SOC_SERIES_EFR32MG21
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select SOC_GECKO_HAS_RADIO
select SOC_GECKO_SERIES2
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_CMU

1
soc/silabs/silabs_s2/efr32mg24/Kconfig
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@@ -13,7 +13,6 @@ config SOC_SERIES_EFR32MG24
select ARMV8_M_DSP
select ARM_TRUSTZONE_M
select SOC_GECKO_HAS_RADIO
select SOC_GECKO_SERIES2
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_CMU