boards: nrf*_bsim: Convert to HW model v2
With a new board.yml file and reorganizing their Kconfig options. Note: the nrf5340 variants remain as their own targets, instead of being variants of the base ones to avoid breakage in this commit (while not having a massime commit) Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
committed by
Carles Cufi
parent
5821b9ec2e
commit
614611a528
@@ -1,31 +0,0 @@
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF52_BSIM
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bool "NRF52 simulation model"
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select SOC_SERIES_BSIM_NRF52X
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select SOC_COMPATIBLE_NRF52833
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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config BOARD_NRF5340BSIM_NRF5340_CPUNET
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bool "Simulated NRF53 Network core"
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select SOC_SERIES_BSIM_NRF53X
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select SOC_COMPATIBLE_NRF5340_CPUNET
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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config BOARD_NRF5340BSIM_NRF5340_CPUAPP
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bool "Simulated NRF53 Application core"
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select SOC_SERIES_BSIM_NRF53X
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select SOC_COMPATIBLE_NRF5340_CPUAPP
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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@@ -73,7 +73,7 @@ set_property(TARGET native_simulator APPEND PROPERTY RUNNER_LINK_LIBRARIES
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target_compile_options(native_simulator INTERFACE
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"-DNSI_PRIMARY_MCU_N=${CONFIG_NATIVE_SIMULATOR_PRIMARY_MCU_INDEX}")
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add_subdirectory(${ZEPHYR_BASE}/boards/boards_legacy/${ARCH}/common/extra_args/
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add_subdirectory(${ZEPHYR_BASE}/boards/native/common/extra_args/
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${CMAKE_CURRENT_BINARY_DIR}/extra_args
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)
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@@ -1,5 +1,40 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF52_BSIM
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bool
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select SOC_SERIES_BSIM_NRF52X
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select SOC_COMPATIBLE_NRF52833
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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NRF52 simulation model
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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config BOARD_NRF5340BSIM_NRF5340_CPUNET
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bool
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select SOC_SERIES_BSIM_NRF53X
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select SOC_COMPATIBLE_NRF5340_CPUNET
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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Simulated NRF53 Network core
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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config BOARD_NRF5340BSIM_NRF5340_CPUAPP
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bool
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select SOC_SERIES_BSIM_NRF53X
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select SOC_COMPATIBLE_NRF5340_CPUAPP
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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help
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Simulated NRF53 Application core
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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if SOC_SERIES_BSIM_NRFXX
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# The following file is normally parsed only for the ARM architecture, which is
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@@ -8,7 +43,7 @@ if SOC_SERIES_BSIM_NRFXX
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# must be read also from here.
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source "soc/nordic_nrf/common/Kconfig.peripherals"
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source "boards/boards_legacy/$(ARCH)/common/extra_args/Kconfig"
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source "boards/native/common/extra_args/Kconfig"
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endif # SOC_SERIES_BSIM_NRFXX
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5
boards/native/nrf_bsim/Kconfig.nrf52_bsim
Normal file
5
boards/native/nrf_bsim/Kconfig.nrf52_bsim
Normal file
@@ -0,0 +1,5 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF52_BSIM
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select SOC_POSIX
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@@ -0,0 +1,5 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF5340BSIM_NRF5340_CPUAPP
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select SOC_POSIX
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@@ -0,0 +1,5 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF5340BSIM_NRF5340_CPUNET
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select SOC_POSIX
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13
boards/native/nrf_bsim/board.yml
Normal file
13
boards/native/nrf_bsim/board.yml
Normal file
@@ -0,0 +1,13 @@
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boards:
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- name: nrf52_bsim
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vendor: Zephyr
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socs:
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- name: native
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- name: nrf5340bsim_nrf5340_cpuapp
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vendor: Zephyr
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socs:
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- name: native
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- name: nrf5340bsim_nrf5340_cpunet
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vendor: Zephyr
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socs:
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- name: native
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@@ -10,7 +10,7 @@
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#include <mem.h>
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#include <arm/nordic/nrf52833.dtsi>
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/* We resuse the pinctrl definitions directly from the real board : */
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#include <../boards/boards_legacy/arm/nrf52833dk_nrf52833/nrf52833dk_nrf52833-pinctrl.dtsi>
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#include <../boards/nordic_nrf/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi>
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/ {
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model = "nrf52 bsim";
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@@ -1,7 +1,6 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_POSIX=y
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CONFIG_BOARD_NRF52_BSIM=y
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CONFIG_CONSOLE=y
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CONFIG_NO_OPTIMIZATIONS=y
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CONFIG_LOG_BACKEND_UART=n
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@@ -115,4 +115,4 @@
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/* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
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* buffer won't be used.
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*/
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#include <../boards/board_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
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#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>
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@@ -1,6 +1,4 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_POSIX=y
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CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUAPP=y
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CONFIG_CONSOLE=y
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CONFIG_NO_OPTIMIZATIONS=y
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@@ -77,4 +77,4 @@
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/* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
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* buffer won't be used.
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*/
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#include <../boards/boards_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
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#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>
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@@ -1,6 +1,4 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_POSIX=y
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CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUNET=y
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CONFIG_CONSOLE=y
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CONFIG_NO_OPTIMIZATIONS=y
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