boards: arm: arty_a7: Convert to v2
Converts the board to hwmv2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
committed by
Carles Cufi
parent
8053c3a8df
commit
94024d940e
@@ -1,12 +0,0 @@
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# Digilent Arty board configuration
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_ARTY_A7_ARM_DESIGNSTART_M1
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bool "Digilent Arty A7 ARM DesignStart Cortex-M1"
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depends on SOC_SERIES_ARM_DESIGNSTART
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config BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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bool "Digilent Arty A7 ARM DesignStart Cortex-M3"
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depends on SOC_SERIES_ARM_DESIGNSTART
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@@ -1,24 +0,0 @@
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# Digilent Arty board configuration
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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config BOARD
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default "arty_a7_arm_designstart_m1" if BOARD_ARTY_A7_ARM_DESIGNSTART_M1
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default "arty_a7_arm_designstart_m3" if BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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config CPU_CORTEX_M_HAS_SYSTICK
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default y
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config CPU_HAS_ARM_MPU
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default y if BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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config NUM_IRQS
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default 7
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config GPIO
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default y if "$(dt_nodelabel_enabled,daplink_qspi_mux)"
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endif # BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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@@ -3,7 +3,7 @@
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zephyr_library()
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zephyr_library_sources(board.c)
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if((CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1) AND (CONFIG_BUILD_OUTPUT_BIN))
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if((CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1) AND (CONFIG_BUILD_OUTPUT_BIN))
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# Generate zephyr.mem verilog memory hex dump file for initialising ITCM in
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# Xilinx Vivado.
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#
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@@ -6,7 +6,7 @@
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config BOARD_INIT_PRIORITY
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int "Board initialization priority"
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default 50
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depends on BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
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depends on BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
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depends on "$(dt_nodelabel_enabled,daplink_qspi_mux)"
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help
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Board initialization priority. The board initialization must take
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8
boards/digilent/arty_a7/Kconfig.arty_a7
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8
boards/digilent/arty_a7/Kconfig.arty_a7
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@@ -0,0 +1,8 @@
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# Digilent Arty board configuration
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_ARTY_A7
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select SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1
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select SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
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20
boards/digilent/arty_a7/Kconfig.defconfig
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20
boards/digilent/arty_a7/Kconfig.defconfig
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@@ -0,0 +1,20 @@
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# Digilent Arty board configuration
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
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config CPU_CORTEX_M_HAS_SYSTICK
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default y
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config CPU_HAS_ARM_MPU
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default y if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
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config NUM_IRQS
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default 7
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config GPIO
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default y if "$(dt_nodelabel_enabled,daplink_qspi_mux)"
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endif # BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
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@@ -1,4 +1,4 @@
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identifier: arty_a7_arm_designstart_m1
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identifier: arty_a7/designstart_fpga_cortex_m1
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name: Digilent Arty A7 ARM DesignStart Cortex-M1
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type: mcu
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arch: arm
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@@ -1,8 +1,5 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_ARM_DESIGNSTART=y
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CONFIG_SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1=y
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CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
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CONFIG_SERIAL=y
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@@ -1,4 +1,4 @@
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identifier: arty_a7_arm_designstart_m3
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identifier: arty_a7/designstart_fpga_cortex_m3
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name: Digilent Arty A7 ARM DesignStart Cortex-M3
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type: mcu
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arch: arm
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@@ -1,8 +1,5 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_ARM_DESIGNSTART=y
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CONFIG_SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3=y
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CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M3=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=50000000
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CONFIG_ARM_MPU=y
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@@ -1,15 +1,12 @@
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1)
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if(CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1)
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board_runner_args(openocd "--use-elf" "--config=${BOARD_DIR}/support/openocd_arty_a7_arm_designstart_m1.cfg")
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board_runner_args(jlink "--device=Cortex-M1" "--reset-after-load")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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elseif(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M3)
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elseif(CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3)
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board_runner_args(openocd "--use-elf" "--config=${BOARD_DIR}/support/openocd_arty_a7_arm_designstart_m3.cfg")
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board_runner_args(jlink "--device=Cortex-M3" "--reset-after-load")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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endif()
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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6
boards/digilent/arty_a7/board.yml
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6
boards/digilent/arty_a7/board.yml
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board:
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name: arty_a7
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vendor: Digilent
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socs:
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- name: designstart_fpga_cortex_m1
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- name: designstart_fpga_cortex_m3
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Before Width: | Height: | Size: 31 KiB After Width: | Height: | Size: 31 KiB |
@@ -44,7 +44,7 @@ following websites:
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Supported Features
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==================
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The ``arty_a7_arm_designstart_m1`` board configuration supports the following
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The ``arty_a7/designstart_fpga_cortex_m1`` board configuration supports the following
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hardware features of the Cortex-M1 reference design:
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+-----------+------------+-------------------------------------+
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@@ -63,9 +63,9 @@ hardware features of the Cortex-M1 reference design:
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+-----------+------------+-------------------------------------+
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The default configuration for the Cortex-M1 can be found in the defconfig file:
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:file:`boards/arm/arty/arty_a7_arm_designstart_m1_defconfig`.
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:file:`boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1_defconfig`.
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In addition to the above, the ``arty_a7_arm_designstart_m3`` board configuration
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In addition to the above, the ``arty_a7/designstart_fpga_cortex_m3`` board configuration
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supports the following hardware features of the Cortex-M3 reference design:
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+-----------+------------+-------------------------------------+
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@@ -75,7 +75,7 @@ supports the following hardware features of the Cortex-M3 reference design:
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+-----------+------------+-------------------------------------+
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The default configuration for the Cortex-M3 can be found in the defconfig file:
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:file:`boards/arm/arty/arty_a7_arm_designstart_m3_defconfig`.
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:file:`boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3_defconfig`.
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Other hardware features are not currently supported by the port.
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@@ -164,7 +164,7 @@ for the Cortex-M1 reference design:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: arty_a7_arm_designstart_m1
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:board: arty_a7/designstart_fpga_cortex_m1
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:goals: flash
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After flashing, you should see message similar to the following in the terminal:
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@@ -172,7 +172,7 @@ After flashing, you should see message similar to the following in the terminal:
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.. code-block:: console
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*** Booting Zephyr OS build zephyr-v2.3.99 ***
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Hello World! arty_a7_arm_designstart_m1
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Hello World! arty_a7
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The same procedure can be used for the Cortex-M3 reference design.
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@@ -195,7 +195,7 @@ Here is an example for the :ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: arty_a7_arm_designstart_m1
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:board: arty_a7/designstart_fpga_cortex_m1
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:goals: debug
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Step through the application in your debugger, and you should see a message
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@@ -204,7 +204,7 @@ similar to the following in the terminal:
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.. code-block:: console
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*** Booting Zephyr OS build zephyr-v2.3.99 ***
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Hello World! arty_a7_arm_designstart_m1
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Hello World! arty_a7
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.. _Digilent Arty:
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https://store.digilentinc.com/arty
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