soc: starfive_jh71xx: Port to HWMv2

Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>

soc/soc_legacy/riscv/starfive_jh71xx/CMakeLists.txt

@@ -1,4 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor
-# SPDX-License-Identifier: Apache-2.0
-
-add_subdirectory(${SOC_SERIES})

soc/soc_legacy/riscv/starfive_jh71xx/Kconfig

@@ -1,15 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-config SOC_FAMILY_STARFIVE_JH71XX
-	bool
-
-if SOC_FAMILY_STARFIVE_JH71XX
-
-config SOC_FAMILY
-	string
-	default "starfive_jh71xx"
-
-source "soc/soc_legacy/riscv/starfive_jh71xx/*/Kconfig.soc"
-
-endif # SOC_FAMILY_STARFIVE_JH71XX

soc/soc_legacy/riscv/starfive_jh71xx/Kconfig.defconfig

@@ -1,4 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-source "soc/soc_legacy/riscv/starfive_jh71xx/*/Kconfig.defconfig.series"

soc/soc_legacy/riscv/starfive_jh71xx/Kconfig.soc

@@ -1,4 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-source "soc/soc_legacy/riscv/starfive_jh71xx/*/Kconfig.series"

soc/soc_legacy/riscv/starfive_jh71xx/jh71xx/Kconfig.defconfig.jh7100

@@ -1,5 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-config SOC
-	default "jh7100" if SOC_JH7100

soc/soc_legacy/riscv/starfive_jh71xx/jh71xx/Kconfig.series

@@ -1,10 +0,0 @@
-# Copyright (c) 2021 Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
-# SPDX-License-Identifier: Apache-2.0
-
-config SOC_SERIES_STARFIVE_JH71XX
-	bool "Starfive JH71XX series"
-	select RISCV
-	select RISCV_PRIVILEGED
-	select RISCV_HAS_PLIC
-	help
-	  Enable support for Starfive JH71XX SoC Series.

soc/starfive/jh71xx/Kconfig

@@ -1,12 +1,12 @@
 # Copyright (c) 2021 Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
 # SPDX-License-Identifier: Apache-2.0
 
-choice
-	prompt "Starfive JH7100 SoC"
-	depends on SOC_SERIES_STARFIVE_JH71XX
+config SOC_SERIES_STARFIVE_JH71XX
+	select RISCV
+	select RISCV_PRIVILEGED
+	select RISCV_HAS_PLIC
 
 config SOC_JH7100
-	bool "Starfive JH7100"
 	select ATOMIC_OPERATIONS_BUILTIN
 	select INCLUDE_RESET_VECTOR
 	select RISCV_ISA_RV64I
@@ -15,5 +15,3 @@ config SOC_JH7100
 	select RISCV_ISA_EXT_C
 	select RISCV_ISA_EXT_ZICSR
 	select RISCV_ISA_EXT_ZIFENCEI
-
-endchoice

soc/starfive/jh71xx/Kconfig.defconfig

@@ -3,9 +3,6 @@
 
 if SOC_SERIES_STARFIVE_JH71XX
 
-config SOC_SERIES
-	default "jh71xx"
-
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 6250000
 
@@ -24,6 +21,4 @@ config 2ND_LVL_INTR_00_OFFSET
 config NUM_IRQS
 	default 139
 
-source "soc/soc_legacy/riscv/starfive_jh71xx/jh71xx/Kconfig.defconfig.jh71*"
-
 endif

soc/starfive/jh71xx/Kconfig.soc

@@ -0,0 +1,19 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STARFIVE_JH71XX
+	bool
+	help
+	  Starfive JH71XX series
+
+config SOC_JH7100
+	bool
+	select SOC_SERIES_STARFIVE_JH71XX
+	help
+	  Starfive JH7100
+
+config SOC_SERIES
+	default "starfive_jh71xx" if SOC_SERIES_STARFIVE_JH71XX
+
+config SOC
+	default "jh7100" if SOC_JH7100

soc/starfive/jh71xx/soc.yml

@@ -0,0 +1,4 @@
+series:
+- name: starfive_jh71xx
+  socs:
+  - name: jh7100