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soc: intel: intel_adsp: Fix issues

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Fixes issues with missing protection guards and selections in
wrong files, and one case of missing bools on 2 fields

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2024-02-23 11:20:07 +00:00
committed by Carles Cufi
parent df9a4223fe
commit a0a7c30f28
7 changed files with 19 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
soc/intel/intel_adsp/Kconfig
View File

@@ -10,6 +10,8 @@ config SOC_FAMILY_INTEL_ADSP
select ARCH_HAS_USERSPACE if XTENSA_MMU
select CPU_CACHE_INCOHERENT
if SOC_FAMILY_INTEL_ADSP
rsource "*/Kconfig"
DT_COMPAT_INTEL_ADSP_HOST_IPC := intel,adsp-host-ipc
@@ -126,3 +128,5 @@ config ADSP_IDLE_CLOCK_GATING
HW configuration of a DSP. Evry time core goes to the WAITI state
(wait for interrupt) during idle, the clock can be gated (however, this
does not mean that this will happen).
endif # SOC_FAMILY_INTEL_ADSP

7
soc/intel/intel_adsp/ace/Kconfig
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@@ -3,7 +3,6 @@
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_INTEL_ADSP_ACE
select SOC_FAMILY_INTEL_ADSP
select XTENSA
select XTENSA_HAL if (("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc") && ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang"))
select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc"
@@ -13,12 +12,6 @@ config SOC_SERIES_INTEL_ADSP_ACE
select SOC_HAS_RUNTIME_NUM_CPUS
select HAS_PM
config SOC_INTEL_ACE15_MTPM
select SOC_SERIES_INTEL_ADSP_ACE
config SOC_INTEL_ACE20_LNL
select SOC_SERIES_INTEL_ADSP_ACE
config SOC_INTEL_COMM_WIDGET
bool "Intel Communication Widget driver"
default y

1
soc/intel/intel_adsp/ace/Kconfig.defconfig.ace15_mtpm
View File

@@ -1,7 +1,6 @@
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_INTEL_ACE15_MTPM
config MP_MAX_NUM_CPUS

1
soc/intel/intel_adsp/ace/Kconfig.defconfig.ace20_lnl
View File

@@ -1,7 +1,6 @@
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_INTEL_ACE20_LNL
config MP_MAX_NUM_CPUS

23
soc/intel/intel_adsp/ace/Kconfig.soc
View File

@@ -4,25 +4,28 @@
config SOC_SERIES_INTEL_ADSP_ACE
bool
select SOC_FAMILY_INTEL_ADSP
help
Intel ADSP ACE
config SOC_INTEL_ACE15_MTPM
bool
select SOC_SERIES_INTEL_ADSP_ACE
help
ACE 1.5 Meteor Lake PCH M
config SOC_INTEL_ACE20_LNL
bool
select SOC_SERIES_INTEL_ADSP_ACE
help
ACE 2.0 Lunar Lake PCH
config SOC_SERIES
default "intel_adsp_ace" if SOC_SERIES_INTEL_ADSP_ACE
config SOC_TOOLCHAIN_NAME
default "intel_ace15_mtpm" if SOC_SERIES_INTEL_ADSP_ACE
config SOC_INTEL_ACE15_MTPM
bool
help
ACE 1.5 Meteor Lake PCH M
config SOC_INTEL_ACE20_LNL
bool
help
ACE 2.0 Lunar Lake PCH
config SOC
default "ace15_mtpm" if SOC_INTEL_ACE15_MTPM
default "ace20_lnl" if SOC_INTEL_ACE20_LNL

2
soc/intel/intel_adsp/cavs/Kconfig
View File

@@ -3,7 +3,6 @@
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_INTEL_ADSP_CAVS
select SOC_FAMILY_INTEL_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang"))
select XTENSA_RESET_VECTOR
@@ -14,6 +13,5 @@ config SOC_SERIES_INTEL_ADSP_CAVS
select HAS_PM
config SOC_INTEL_CAVS_V25
select SOC_SERIES_INTEL_ADSP_CAVS
select XTENSA_WAITI_BUG
select SCHED_IPI_SUPPORTED

2
soc/intel/intel_adsp/cavs/Kconfig.soc
View File

@@ -4,6 +4,7 @@
config SOC_SERIES_INTEL_ADSP_CAVS
bool
select SOC_FAMILY_INTEL_ADSP
help
Intel ADSP CAVS
@@ -12,6 +13,7 @@ config SOC_SERIES
config SOC_INTEL_CAVS_V25
bool
select SOC_SERIES_INTEL_ADSP_CAVS
help
Intel Tiger Lake