soc: arm64: intel_socfpga: Move and convert to HWMv2

Move and convert soc/arm64/intel_socfpga SoC family
`intel_socfpga` configuration to HWMv2 with its SoC
series: `agilex` and `agilex5` and related SoCs:
`intel_socfpga_agilex` and `intel_socfpga_agilex5`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
This commit is contained in:
Dmitrii Golovanov
2024-02-12 22:26:52 +01:00
committed by Carles Cufi
parent 7c8b7a153b
commit ab883b8019
29 changed files with 105 additions and 91 deletions

View File

@@ -0,0 +1,8 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_INTEL_SOCFPGA
rsource "*/Kconfig"
endif # SOC_FAMILY_INTEL_SOCFPGA

View File

@@ -0,0 +1,8 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_INTEL_SOCFPGA
rsource "*/Kconfig.defconfig.series"
endif # SOC_FAMILY_INTEL_SOCFPGA

View File

@@ -0,0 +1,10 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_INTEL_SOCFPGA
bool
config SOC_FAMILY
default "intel_socfpga" if SOC_FAMILY_INTEL_SOCFPGA
rsource "*/Kconfig.soc"

View File

@@ -0,0 +1,6 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX
select ARM64
select CPU_CORTEX_A53

View File

@@ -1,11 +1,8 @@
# Copyright (c) 2021 Intel Corporation
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_AGILEX
config SOC
default "intel_socfpga_agilex"
# must be >= the highest interrupt number used
# - include the UART interrupts 173 or 204
config NUM_IRQS

View File

@@ -0,0 +1,8 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_AGILEX
rsource "Kconfig.defconfig.agilex*"
endif # SOC_SERIES_AGILEX

View File

@@ -0,0 +1,20 @@
# Copyright (c) 2021-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX
bool
select SOC_FAMILY_INTEL_SOCFPGA
help
Intel SoC FPGA Agilex Series
config SOC_SERIES
default "agilex" if SOC_SERIES_AGILEX
config SOC_AGILEX
bool
select SOC_SERIES_AGILEX
help
Intel SoC FPGA Agilex
config SOC
default "intel_socfpga_agilex" if SOC_AGILEX

View File

@@ -0,0 +1,6 @@
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX5
select ARM64
select CPU_CORTEX_A76_A55

View File

@@ -1,11 +1,8 @@
# Copyright (c) 2022 Intel Corporation
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_AGILEX5
config SOC
default "intel_socfpga_agilex5"
# must be >= the highest interrupt number used
# - include the UART interrupts 173 or 204
config NUM_IRQS

View File

@@ -0,0 +1,8 @@
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_AGILEX5
rsource "Kconfig.defconfig.agilex5*"
endif # SOC_SERIES_AGILEX5

View File

@@ -0,0 +1,20 @@
# Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX5
bool
select SOC_FAMILY_INTEL_SOCFPGA
help
Intel SoC FPGA Agilex5 Series
config SOC_SERIES
default "agilex5" if SOC_SERIES_AGILEX5
config SOC_AGILEX5
bool
select SOC_SERIES_AGILEX5
help
Intel SoC FPGA Agilex5
config SOC
default "intel_socfpga_agilex5" if SOC_AGILEX5

View File

@@ -0,0 +1,9 @@
family:
- name: intel_socfpga
series:
- name: agilex
socs:
- name: intel_socfpga_agilex
- name: agilex5
socs:
- name: intel_socfpga_agilex5

View File

@@ -1,13 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_INTEL_SOCFPGA
bool
if SOC_FAMILY_INTEL_SOCFPGA
config SOC_FAMILY
string
default "intel_socfpga"
source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.soc"
endif

View File

@@ -1,4 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.defconfig.series"

View File

@@ -1,4 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.series"

View File

@@ -1,11 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_AGILEX
config SOC_SERIES
default "agilex"
source "soc/soc_legacy/arm64/intel_socfpga/agilex/Kconfig.defconfig.agilex*"
endif # SOC_SERIES_AGILEX

View File

@@ -1,10 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX
bool "Intel SoC FPGA Agilex Series"
select ARM64
select CPU_CORTEX_A53
select SOC_FAMILY_INTEL_SOCFPGA
help
Enable support for Intel SoC FPGA Series

View File

@@ -1,10 +0,0 @@
# Copyright (c) 2021 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
choice
prompt "Intel SoC FPGA Agilex"
depends on SOC_SERIES_AGILEX
config SOC_AGILEX
bool "Intel SoC FPGA Agilex"
endchoice

View File

@@ -1,11 +0,0 @@
# Copyright (c) 2022 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_AGILEX5
config SOC_SERIES
default "agilex5"
source "soc/soc_legacy/arm64/intel_socfpga/agilex5/Kconfig.defconfig.agilex5*"
endif # SOC_SERIES_AGILEX5

View File

@@ -1,10 +0,0 @@
# Copyright (c) 2022 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_AGILEX5
bool "Intel SoC FPGA Agilex5 Series"
select ARM64
select CPU_CORTEX_A76_A55
select SOC_FAMILY_INTEL_SOCFPGA
help
Enable support for Intel SoC FPGA Series

View File

@@ -1,10 +0,0 @@
# Copyright (c) 2022 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
choice
prompt "Intel SoC FPGA Agilex5"
depends on SOC_SERIES_AGILEX5
config SOC_AGILEX5
bool "Intel SoC FPGA Agilex5"
endchoice