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soc: psoc6 and psoc_6: Port to HWMv2

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Ports the psoc6 and psoc_6 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2024-02-05 12:12:57 +00:00
committed by Carles Cufi
parent 105a2bae84
commit af243274c2
51 changed files with 1401 additions and 1229 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
soc/soc_legacy/arm/cypress/CMakeLists.txt → soc/cypress/CMakeLists.txt
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@@ -5,5 +5,4 @@
# SPDX-License-Identifier: Apache-2.0
#
add_subdirectory(${SOC_SERIES})
add_subdirectory(common)
add_subdirectory(psoc6)

3
soc/soc_legacy/arm/cypress/Kconfig.soc → soc/cypress/Kconfig
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@@ -1,4 +1,5 @@
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/cypress/*/Kconfig.series"
rsource "*/Kconfig"

8
soc/cypress/Kconfig.defconfig Normal file
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@@ -0,0 +1,8 @@
# Copyright (c) 2018, Cypress
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_PSOC6 || SOC_FAMILY_INFINEON_CAT1
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_PSOC6 || SOC_FAMILY_INFINEON_CAT1

17
soc/cypress/Kconfig.soc Normal file
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@@ -0,0 +1,17 @@
# Copyright (c) 2018, Cypress
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_PSOC6
bool
config SOC_FAMILY_INFINEON_CAT1
bool
config SOC_FAMILY_INFINEON_CAT1A
bool
config SOC_FAMILY
default "psoc6" if SOC_FAMILY_PSOC6
default "infineon_cat1" if SOC_FAMILY_INFINEON_CAT1
rsource "*/Kconfig.soc"

32
soc/cypress/psoc6/CMakeLists.txt Normal file
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@@ -0,0 +1,32 @@
#
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
#
# SPDX-License-Identifier: Apache-2.0
#
if(CONFIG_SOC_SERIES_PSOC62 OR CONFIG_SOC_SERIES_PSOC63)
add_subdirectory(old/common)
zephyr_include_directories(old)
zephyr_sources(old/soc.c)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_PSOC6 NOINIT old/noinit.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_PSOC6 RWDATA old/rwdata.ld)
else()
zephyr_include_directories(new)
zephyr_include_directories(new/common)
zephyr_sources(new/soc.c)
# Add sections
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1 NOINIT new/noinit.ld)
# Add section for cm0p image ROM
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A ROM_START SORT_KEY 0x0cm0p new/rom_cm0image.ld)
# Add section for cm0p image RAM
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A RAM_SECTIONS SORT_KEY 0 new/ram_cm0image.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A RAMFUNC_SECTION SORT_KEY 0 new/ram_func.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1 RODATA SORT_KEY 0 new/rom.ld)
endif()
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

58
soc/cypress/psoc6/Kconfig Normal file
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@@ -0,0 +1,58 @@
# Cypress Semiconductor PSoC6 series configuration options
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_PSOC62_PSOC63
bool
select ARM
select HAS_CYPRESS_DRIVERS
select CPU_CORTEX_M0PLUS if SOC_CY8C6247_M0 || SOC_CY8C6347_M0
select CPU_CORTEX_M_HAS_SYSTICK if SOC_CY8C6247_M0 || SOC_CY8C6347_M0
select CPU_CORTEX_M_HAS_VTOR if SOC_CY8C6247_M0 || SOC_CY8C6347_M0
select CPU_HAS_ARM_MPU if SOC_CY8C6247_M0 || SOC_CY8C6347_M0
select CPU_CORTEX_M4 if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
select CPU_CORTEX_M_HAS_DWT if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
select CPU_CORTEX_M_HAS_SYSTICK if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
select CPU_HAS_ARM_MPU if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
select CPU_HAS_FPU if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
config SOC_SERIES_PSOC62
select SOC_SERIES_PSOC62_PSOC63
config SOC_SERIES_PSOC63
select SOC_SERIES_PSOC62_PSOC63
config SOC_PSOC6_M0_ENABLES_M4
bool "Dual-core support [activate Cortex-M4]"
depends on SOC_CY8C6247_M0 || SOC_CY8C6347_M0
help
Cortex-M0 CPU should boot Cortex-M4
config SOC_DIE_PSOC6
select ARM
select CPU_CORTEX_M4
select CPU_HAS_ARM_MPU
select DYNAMIC_INTERRUPTS
select CPU_HAS_FPU
if SOC_FAMILY_INFINEON_CAT1A
## PSoC™ 6 Cortex M0+ prebuilt images
choice
prompt "PSoC™ 6 Cortex M0+ prebuilt images"
help
Choose the prebuilt application image to be executed on the Cortex-M0+ core of the PSoC™ 6
dual-core MCU. The image is responsible for booting the Cortex-M4 on the device.
config SOC_PSOC6_CM0P_IMAGE_SLEEP
bool "DeepSleep"
help
DeepSleep prebuilt application image is executed on the Cortex-M0+ core of the PSoC™ 6 BLE
dual-core MCU.The image is provided as C array ready to be compiled as part of the Cortex-M4
application. The Cortex-M0+ application code is placed to internal flash by the Cortex-M4
linker script.
endchoice
endif # SOC_FAMILY_INFINEON_CAT1A

30
soc/cypress/psoc6/Kconfig.defconfig Normal file
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@@ -0,0 +1,30 @@
# Cypress Semiconductor PSoC6 series configuration options
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_PSOC62 || SOC_SERIES_PSOC63
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 50000000
rsource "old/Kconfig.defconfig.psoc*"
endif # SOC_SERIES_PSOC62 || SOC_SERIES_PSOC63
if SOC_FAMILY_INFINEON_CAT1
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000
config SOC_PSOC6_CM0P_IMAGE_ROM_SIZE
hex
default 0x2000 if SOC_PSOC6_CM0P_IMAGE_SLEEP
config SOC_PSOC6_CM0P_IMAGE_RAM_SIZE
hex
default 0x2000 if SOC_PSOC6_CM0P_IMAGE_SLEEP
rsource "new/Kconfig.defconfig.psoc6*"
endif # SOC_FAMILY_INFINEON_CAT1

1074
soc/cypress/psoc6/Kconfig.soc Normal file
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15
soc/cypress/psoc6/new/Kconfig.defconfig.psoc6_01 Normal file
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@@ -0,0 +1,15 @@
# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_01 based MCU default configuration
if SOC_DIE_PSOC6_01
config NUM_IRQS
default 32 if CPU_CORTEX_M0PLUS
default 147 if CPU_CORTEX_M4
# add additional die specific params
endif # SOC_DIE_PSOC6_01

15
soc/cypress/psoc6/new/Kconfig.defconfig.psoc6_02 Normal file
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@@ -0,0 +1,15 @@
# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_02 based MCU default configuration
if SOC_DIE_PSOC6_02
config NUM_IRQS
default 32 if CPU_CORTEX_M0PLUS
default 168 if CPU_CORTEX_M4
# add additional die specific params
endif # SOC_DIE_PSOC6_02

14
soc/cypress/psoc6/new/Kconfig.defconfig.psoc6_04 Normal file
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@@ -0,0 +1,14 @@
# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# Copyright (c) David Ullmann
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_04 based MCU default configuration
if SOC_DIE_PSOC6_04
config NUM_IRQS
default 16 if CPU_CORTEX_M0PLUS
default 175 if CPU_CORTEX_M4
endif # SOC_DIE_PSOC6_04

0
soc/soc_legacy/arm/infineon_cat1/common/pinctrl_soc.h → soc/cypress/psoc6/new/common/pinctrl_soc.h
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/noinit.ld → soc/cypress/psoc6/new/noinit.ld
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/ram_cm0image.ld → soc/cypress/psoc6/new/ram_cm0image.ld
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/ram_func.ld → soc/cypress/psoc6/new/ram_func.ld
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/rom.ld → soc/cypress/psoc6/new/rom.ld
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/rom_cm0image.ld → soc/cypress/psoc6/new/rom_cm0image.ld
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/soc.c → soc/cypress/psoc6/new/soc.c
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0
soc/soc_legacy/arm/infineon_cat1/psoc6/soc.h → soc/cypress/psoc6/new/soc.h
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8
soc/soc_legacy/arm/cypress/psoc6/Kconfig.defconfig.psoc6_m0 → soc/cypress/psoc6/old/Kconfig.defconfig.psoc6_m0
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@@ -1,14 +1,10 @@
# Cypress PSoC6 CM0 platform configuration options
# Copyright (c) 2018, Cypress
# SPDX-License-Identifier: Apache-2.0
if SOC_PSOC6_M0
config SOC
default "psoc6_m0"
if SOC_CY8C6247_M0 || SOC_CY8C6347_M0
config NUM_IRQS
default 32
endif # SOC_PSOC6_M0
endif # SOC_CY8C6247_M0 || SOC_CY8C6347_M0

8
soc/soc_legacy/arm/cypress/psoc6/Kconfig.defconfig.psoc6_m4 → soc/cypress/psoc6/old/Kconfig.defconfig.psoc6_m4
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@@ -1,14 +1,10 @@
# Cypress PSoC6 CM4 platform configuration options
# Copyright (c) 2018, Cypress
# SPDX-License-Identifier: Apache-2.0
if SOC_PSOC6_M4
config SOC
default "psoc6_m4"
if SOC_CY8C6247_M4 || SOC_CY8C6347_M4
config NUM_IRQS
default 147
endif # SOC_PSOC6_M4
endif # SOC_CY8C6247_M4 || SOC_CY8C6347_M4

0
soc/soc_legacy/arm/cypress/common/CMakeLists.txt → soc/cypress/psoc6/old/common/CMakeLists.txt
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0
soc/soc_legacy/arm/cypress/common/cypress_psoc6_dt.h → soc/cypress/psoc6/old/common/cypress_psoc6_dt.h
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0
soc/soc_legacy/arm/cypress/common/soc_gpio.c → soc/cypress/psoc6/old/common/soc_gpio.c
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0
soc/soc_legacy/arm/cypress/common/soc_gpio.h → soc/cypress/psoc6/old/common/soc_gpio.h
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0
soc/soc_legacy/arm/cypress/psoc6/noinit.ld → soc/cypress/psoc6/old/noinit.ld
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0
soc/soc_legacy/arm/cypress/psoc6/rwdata.ld → soc/cypress/psoc6/old/rwdata.ld
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0
soc/soc_legacy/arm/cypress/psoc6/soc.c → soc/cypress/psoc6/old/soc.c
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0
soc/soc_legacy/arm/cypress/psoc6/soc.h → soc/cypress/psoc6/old/soc.h
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131
soc/cypress/soc.yml Normal file
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@@ -0,0 +1,131 @@
family:
- name: psoc6
series:
- name: psoc62
socs:
- name: cy8c6247
cpuclusters:
- name: m0
- name: m4
- name: psoc63
socs:
- name: cy8c6347
cpuclusters:
- name: m0
- name: m4
- name: infineon_cat1
series:
- name: psoc6
socs:
- name: cy8c6036bzi_f04
- name: cy8c6016bzi_f04
- name: cy8c6116bzi_f54
- name: cy8c6136bzi_f14
- name: cy8c6136bzi_f34
- name: cy8c6137bzi_f14
- name: cy8c6137bzi_f34
- name: cy8c6137bzi_f54
- name: cy8c6117bzi_f34
- name: cy8c6246bzi_d04
- name: cy8c6247bzi_d44
- name: cy8c6247bzi_d34
- name: cy8c6247bzi_d54
- name: cy8c6336bzi_blf03
- name: cy8c6316bzi_blf03
- name: cy8c6316bzi_blf53
- name: cy8c6336bzi_bld13
- name: cy8c6347bzi_bld43
- name: cy8c6347bzi_bld33
- name: cy8c6347bzi_bld53
- name: cy8c6347fmi_bld13
- name: cy8c6347fmi_bld43
- name: cy8c6347fmi_bld33
- name: cy8c6347fmi_bld53
- name: cy8c6137fdi_f02
- name: cy8c6117fdi_f02
- name: cy8c6247fdi_d02
- name: cy8c6247fdi_d32
- name: cy8c6336bzi_bud13
- name: cy8c6347bzi_bud43
- name: cy8c6347bzi_bud33
- name: cy8c6347bzi_bud53
- name: cy8c6337bzi_blf13
- name: cy8c6136fdi_f42
- name: cy8c6247fdi_d52
- name: cy8c6136fti_f42
- name: cy8c6247fti_d52
- name: cy8c6247bzi_aud54
- name: cy8c6336bzi_blf04
- name: cy8c6316bzi_blf04
- name: cy8c6316bzi_blf54
- name: cy8c6336bzi_bld14
- name: cy8c6347bzi_bld44
- name: cy8c6347bzi_bld34
- name: cy8c6347bzi_bld54
- name: cy8c6247bfi_d54
- name: cyble_416045_02
- name: cy8c6347fmi_bud53
- name: cy8c6347fmi_bud13
- name: cy8c6347fmi_bud43
- name: cy8c6347fmi_bud33
- name: cy8c6137wi_f54
- name: cy8c6117wi_f34
- name: cy8c6247wi_d54
- name: cy8c6336lqi_blf02
- name: cy8c6336lqi_blf42
- name: cy8c6347lqi_bld52
- name: cyb06447bzi_bld54
- name: cyb06447bzi_bld53
- name: cyb06447bzi_d54
- name: cyb0644abzi_s2d44
- name: cys0644abzi_s2d44
- name: cy8c624abzi_s2d44a0
- name: cy8c624abzi_s2d44
- name: cy8c624aazi_s2d44
- name: cy8c624afni_s2d43
- name: cy8c624abzi_s2d04
- name: cy8c624abzi_s2d14
- name: cy8c624aazi_s2d14
- name: cy8c6248azi_s2d14
- name: cy8c6248bzi_s2d44
- name: cy8c6248azi_s2d44
- name: cy8c6248fni_s2d43
- name: cy8c614abzi_s2f04
- name: cy8c614aazi_s2f04
- name: cy8c614afni_s2f03
- name: cy8c614aazi_s2f14
- name: cy8c614abzi_s2f44
- name: cy8c614aazi_s2f44
- name: cy8c614afni_s2f43
- name: cy8c6148bzi_s2f44
- name: cy8c6148azi_s2f44
- name: cy8c6148fni_s2f43
- name: cy8c624abzi_d44
- name: cy8c624alqi_s2d42
- name: cy8c624alqi_s2d02
- name: cy8c6248lqi_s2d42
- name: cy8c6248lqi_s2d02
- name: cy8c614alqi_s2f42
- name: cy8c614alqi_s2f02
- name: cy8c6148lqi_s2f42
- name: cy8c6148lqi_s2f02
- name: cy8c6244azi_s4d92
- name: cy8c6244lqi_s4d92
- name: cy8c6244azi_s4d93
- name: cy8c6244azi_s4d82
- name: cy8c6244lqi_s4d82
- name: cy8c6244azi_s4d83
- name: cy8c6244azi_s4d62
- name: cy8c6244lqi_s4d62
- name: cy8c6244azi_s4d12
- name: cy8c6244lqi_s4d12
- name: cy8c6144azi_s4f92
- name: cy8c6144lqi_s4f92
- name: cy8c6144azi_s4f93
- name: cy8c6144azi_s4f82
- name: cy8c6144lqi_s4f82
- name: cy8c6144azi_s4f83
- name: cy8c6144azi_s4f62
- name: cy8c6144lqi_s4f62
- name: cy8c6144azi_s4f12
- name: cy8c6144lqi_s4f12

44
soc/soc_legacy/arm/cypress/Kconfig
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@@ -1,44 +0,0 @@
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
choice
prompt "Cypress PSoC6 MCU Selection"
depends on SOC_SERIES_PSOC62 || \
SOC_SERIES_PSOC63
config SOC_PSOC6_M0
bool "SOC_PSOC6_M0"
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select CPU_HAS_ARM_MPU
config SOC_PSOC6_M4
bool "SOC_PSOC6_M4"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
endchoice
config SOC_PSOC6_M0_ENABLES_M4
bool "Dual-core support [activate Cortex-M4]"
depends on SOC_PSOC6_M0
help
Cortex-M0 CPU should boot Cortex-M4
config SOC_FAMILY_PSOC6
bool
if SOC_FAMILY_PSOC6
config SOC_FAMILY
string
default "cypress"
source "soc/soc_legacy/arm/cypress/*/Kconfig.soc"
endif # SOC_FAMILY_PSOC6

4
soc/soc_legacy/arm/cypress/Kconfig.defconfig
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@@ -1,4 +0,0 @@
# Copyright (c) 2018, Cypress
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/cypress/*/Kconfig.defconfig.series"

16
soc/soc_legacy/arm/cypress/psoc6/CMakeLists.txt
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@@ -1,16 +0,0 @@
#
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
#
# SPDX-License-Identifier: Apache-2.0
#
zephyr_include_directories(.)
zephyr_sources(
soc.c
)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_PSOC6 NOINIT noinit.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_PSOC6 RWDATA rwdata.ld)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

25
soc/soc_legacy/arm/cypress/psoc6/Kconfig.defconfig.series
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@@ -1,25 +0,0 @@
# Cypress Semiconductor PSoC6 series configuration options
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_PSOC62 || \
SOC_SERIES_PSOC63
config SOC_SERIES
default "psoc6"
config SOC_PART_NUMBER
default "CY8C6247BZI_D54" if SOC_PART_NUMBER_CY8C6247BZI_D54
config SOC_PART_NUMBER
default "CY8C6347BZI_BLD53" if SOC_PART_NUMBER_CY8C6347BZI_BLD53
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 50000000
source "soc/soc_legacy/arm/cypress/psoc6/Kconfig.defconfig.psoc*"
endif # SOC_SERIES_PSOC62 || \
# SOC_SERIES_PSOC63

21
soc/soc_legacy/arm/cypress/psoc6/Kconfig.series
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@@ -1,21 +0,0 @@
# Cypress PSoC6 MCU line
# Copyright (c) 2018, Cypress Semiconductor
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_PSOC62
bool "Cypress PSoC6 series MCU - Standard"
select ARM
select SOC_FAMILY_PSOC6
select HAS_CYPRESS_DRIVERS
help
Enable support for Cypress PSoC6 MCU series
config SOC_SERIES_PSOC63
bool "Cypress PSoC6 series MCU - Bluetooth Low Energy"
select ARM
select SOC_FAMILY_PSOC6
select HAS_CYPRESS_DRIVERS
help
Enable support for Cypress PSoC6-BLE MCU series

20
soc/soc_legacy/arm/cypress/psoc6/Kconfig.soc
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@@ -1,20 +0,0 @@
# Cypress PSOC6 MCU line
# Copyright (c) 2018, Cypress
# Copyright (c) 2020, ATL Electronics
# SPDX-License-Identifier: Apache-2.0
choice
prompt "Cypress PSoC6 MCU Selection"
depends on SOC_SERIES_PSOC62 || \
SOC_SERIES_PSOC63
config SOC_PART_NUMBER_CY8C6247BZI_D54
bool "CY8C6247BZI_D54"
depends on SOC_SERIES_PSOC62
config SOC_PART_NUMBER_CY8C6347BZI_BLD53
bool "CY8C6347BZI_BLD53"
depends on SOC_SERIES_PSOC63
endchoice

6
soc/soc_legacy/arm/infineon_cat1/CMakeLists.txt
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@@ -1,6 +0,0 @@
# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
zephyr_include_directories(common/)
add_subdirectory(${SOC_SERIES})

19
soc/soc_legacy/arm/infineon_cat1/Kconfig
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@@ -1,19 +0,0 @@
# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_INFINEON_CAT1
bool
config SOC_FAMILY_INFINEON_CAT1A
bool
if SOC_FAMILY_INFINEON_CAT1
source "soc/soc_legacy/arm/infineon_cat1/*/Kconfig.soc"
config SOC_FAMILY
string
default "infineon_cat1"
endif # SOC_FAMILY_INFINEON_CAT1

5
soc/soc_legacy/arm/infineon_cat1/Kconfig.defconfig
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@@ -1,5 +0,0 @@
# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/infineon_cat1/*/Kconfig.defconfig"

5
soc/soc_legacy/arm/infineon_cat1/Kconfig.soc
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/infineon_cat1/*/Kconfig.series"

21
soc/soc_legacy/arm/infineon_cat1/psoc6/CMakeLists.txt
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
zephyr_sources(soc.c)
zephyr_include_directories(.)
# Add sections
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1 NOINIT noinit.ld)
# Add section for cm0p image ROM
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A ROM_START SORT_KEY 0x0cm0p rom_cm0image.ld)
# Add section for cm0p image RAM
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A RAM_SECTIONS SORT_KEY 0 ram_cm0image.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1A RAMFUNC_SECTION SORT_KEY 0 ram_func.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_FAMILY_INFINEON_CAT1 RODATA SORT_KEY 0 rom.ld)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

22
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_INFINEON_CAT1
source "soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc.*"
config SOC_SERIES
default "psoc6"
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000
config SOC_PSOC6_CM0P_IMAGE_ROM_SIZE
hex
default 0x2000 if SOC_PSOC6_CM0P_IMAGE_SLEEP
config SOC_PSOC6_CM0P_IMAGE_RAM_SIZE
hex
default 0x2000 if SOC_PSOC6_CM0P_IMAGE_SLEEP
endif # SOC_FAMILY_INFINEON_CAT1A

5
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc.*"

77
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc.psoc6_01
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# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_01 based MCU default configuration
if SOC_DIE_PSOC6_01
config NUM_IRQS
default 32 if CPU_CORTEX_M0PLUS
default 147 if CPU_CORTEX_M4
config SOC
default "CY8C6036BZI_F04" if SOC_CY8C6036BZI_F04
default "CY8C6016BZI_F04" if SOC_CY8C6016BZI_F04
default "CY8C6116BZI_F54" if SOC_CY8C6116BZI_F54
default "CY8C6136BZI_F14" if SOC_CY8C6136BZI_F14
default "CY8C6136BZI_F34" if SOC_CY8C6136BZI_F34
default "CY8C6137BZI_F14" if SOC_CY8C6137BZI_F14
default "CY8C6137BZI_F34" if SOC_CY8C6137BZI_F34
default "CY8C6137BZI_F54" if SOC_CY8C6137BZI_F54
default "CY8C6117BZI_F34" if SOC_CY8C6117BZI_F34
default "CY8C6246BZI_D04" if SOC_CY8C6246BZI_D04
default "CY8C6247BZI_D44" if SOC_CY8C6247BZI_D44
default "CY8C6247BZI_D34" if SOC_CY8C6247BZI_D34
default "CY8C6247BZI_D54" if SOC_CY8C6247BZI_D54
default "CY8C6336BZI_BLF03" if SOC_CY8C6336BZI_BLF03
default "CY8C6316BZI_BLF03" if SOC_CY8C6316BZI_BLF03
default "CY8C6316BZI_BLF53" if SOC_CY8C6316BZI_BLF53
default "CY8C6336BZI_BLD13" if SOC_CY8C6336BZI_BLD13
default "CY8C6347BZI_BLD43" if SOC_CY8C6347BZI_BLD43
default "CY8C6347BZI_BLD33" if SOC_CY8C6347BZI_BLD33
default "CY8C6347BZI_BLD53" if SOC_CY8C6347BZI_BLD53
default "CY8C6347FMI_BLD13" if SOC_CY8C6347FMI_BLD13
default "CY8C6347FMI_BLD43" if SOC_CY8C6347FMI_BLD43
default "CY8C6347FMI_BLD33" if SOC_CY8C6347FMI_BLD33
default "CY8C6347FMI_BLD53" if SOC_CY8C6347FMI_BLD53
default "CY8C6137FDI_F02" if SOC_CY8C6137FDI_F02
default "CY8C6117FDI_F02" if SOC_CY8C6117FDI_F02
default "CY8C6247FDI_D02" if SOC_CY8C6247FDI_D02
default "CY8C6247FDI_D32" if SOC_CY8C6247FDI_D32
default "CY8C6336BZI_BUD13" if SOC_CY8C6336BZI_BUD13
default "CY8C6347BZI_BUD43" if SOC_CY8C6347BZI_BUD43
default "CY8C6347BZI_BUD33" if SOC_CY8C6347BZI_BUD33
default "CY8C6347BZI_BUD53" if SOC_CY8C6347BZI_BUD53
default "CY8C6337BZI_BLF13" if SOC_CY8C6337BZI_BLF13
default "CY8C6136FDI_F42" if SOC_CY8C6136FDI_F42
default "CY8C6247FDI_D52" if SOC_CY8C6247FDI_D52
default "CY8C6136FTI_F42" if SOC_CY8C6136FTI_F42
default "CY8C6247FTI_D52" if SOC_CY8C6247FTI_D52
default "CY8C6247BZI_AUD54" if SOC_CY8C6247BZI_AUD54
default "CY8C6336BZI_BLF04" if SOC_CY8C6336BZI_BLF04
default "CY8C6316BZI_BLF04" if SOC_CY8C6316BZI_BLF04
default "CY8C6316BZI_BLF54" if SOC_CY8C6316BZI_BLF54
default "CY8C6336BZI_BLD14" if SOC_CY8C6336BZI_BLD14
default "CY8C6347BZI_BLD44" if SOC_CY8C6347BZI_BLD44
default "CY8C6347BZI_BLD34" if SOC_CY8C6347BZI_BLD34
default "CY8C6347BZI_BLD54" if SOC_CY8C6347BZI_BLD54
default "CY8C6247BFI_D54" if SOC_CY8C6247BFI_D54
default "CYBLE_416045_02_device" if SOC_CYBLE_416045_02
default "CY8C6347FMI_BUD53" if SOC_CY8C6347FMI_BUD53
default "CY8C6347FMI_BUD13" if SOC_CY8C6347FMI_BUD13
default "CY8C6347FMI_BUD43" if SOC_CY8C6347FMI_BUD43
default "CY8C6347FMI_BUD33" if SOC_CY8C6347FMI_BUD33
default "CY8C6137WI_F54" if SOC_CY8C6137WI_F54
default "CY8C6117WI_F34" if SOC_CY8C6117WI_F34
default "CY8C6247WI_D54" if SOC_CY8C6247WI_D54
default "CY8C6336LQI_BLF02" if SOC_CY8C6336LQI_BLF02
default "CY8C6336LQI_BLF42" if SOC_CY8C6336LQI_BLF42
default "CY8C6347LQI_BLD52" if SOC_CY8C6347LQI_BLD52
default "CYB06447BZI_BLD54" if SOC_CYB06447BZI_BLD54
default "CYB06447BZI_BLD53" if SOC_CYB06447BZI_BLD53
default "CYB06447BZI_D54" if SOC_CYB06447BZI_D54
# add additional die specific params
endif # SOC_DIE_PSOC6_01

49
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc.psoc6_02
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# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_02 based MCU default configuration
if SOC_DIE_PSOC6_02
config NUM_IRQS
default 32 if CPU_CORTEX_M0PLUS
default 168 if CPU_CORTEX_M4
config SOC
default "CYB0644ABZI_S2D44" if SOC_CYB0644ABZI_S2D44
default "CYS0644ABZI_S2D44" if SOC_CYS0644ABZI_S2D44
default "CY8C624ABZI_S2D44A0" if SOC_CY8C624ABZI_S2D44A0
default "CY8C624ABZI_S2D44" if SOC_CY8C624ABZI_S2D44
default "CY8C624AAZI_S2D44" if SOC_CY8C624AAZI_S2D44
default "CY8C624AFNI_S2D43" if SOC_CY8C624AFNI_S2D43
default "CY8C624ABZI_S2D04" if SOC_CY8C624ABZI_S2D04
default "CY8C624ABZI_S2D14" if SOC_CY8C624ABZI_S2D14
default "CY8C624AAZI_S2D14" if SOC_CY8C624AAZI_S2D14
default "CY8C6248AZI_S2D14" if SOC_CY8C6248AZI_S2D14
default "CY8C6248BZI_S2D44" if SOC_CY8C6248BZI_S2D44
default "CY8C6248AZI_S2D44" if SOC_CY8C6248AZI_S2D44
default "CY8C6248FNI_S2D43" if SOC_CY8C6248FNI_S2D43
default "CY8C614ABZI_S2F04" if SOC_CY8C614ABZI_S2F04
default "CY8C614AAZI_S2F04" if SOC_CY8C614AAZI_S2F04
default "CY8C614AFNI_S2F03" if SOC_CY8C614AFNI_S2F03
default "CY8C614AAZI_S2F14" if SOC_CY8C614AAZI_S2F14
default "CY8C614ABZI_S2F44" if SOC_CY8C614ABZI_S2F44
default "CY8C614AAZI_S2F44" if SOC_CY8C614AAZI_S2F44
default "CY8C614AFNI_S2F43" if SOC_CY8C614AFNI_S2F43
default "CY8C6148BZI_S2F44" if SOC_CY8C6148BZI_S2F44
default "CY8C6148AZI_S2F44" if SOC_CY8C6148AZI_S2F44
default "CY8C6148FNI_S2F43" if SOC_CY8C6148FNI_S2F43
default "CY8C624ABZI_D44" if SOC_CY8C624ABZI_D44
default "CY8C624ALQI_S2D42" if SOC_CY8C624ALQI_S2D42
default "CY8C624ALQI_S2D02" if SOC_CY8C624ALQI_S2D02
default "CY8C6248LQI_S2D42" if SOC_CY8C6248LQI_S2D42
default "CY8C6248LQI_S2D02" if SOC_CY8C6248LQI_S2D02
default "CY8C614ALQI_S2F42" if SOC_CY8C614ALQI_S2F42
default "CY8C614ALQI_S2F02" if SOC_CY8C614ALQI_S2F02
default "CY8C6148LQI_S2F42" if SOC_CY8C6148LQI_S2F42
default "CY8C6148LQI_S2F02" if SOC_CY8C6148LQI_S2F02
# add additional die specific params
endif # SOC_DIE_PSOC6_02

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soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.defconfig.soc.psoc6_04
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# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# Copyright (c) David Ullmann
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_04 based MCU default configuration
if SOC_DIE_PSOC6_04
config NUM_IRQS
default 16 if CPU_CORTEX_M0PLUS
default 175 if CPU_CORTEX_M4
config SOC
default "CY8C6244AZI_S4D92" if SOC_CY8C6244AZI_S4D92
default "CY8C6244LQI_S4D92" if SOC_CY8C6244LQI_S4D92
default "CY8C6244AZI_S4D93" if SOC_CY8C6244AZI_S4D93
default "CY8C6244AZI_S4D82" if SOC_CY8C6244AZI_S4D82
default "CY8C6244LQI_S4D82" if SOC_CY8C6244LQI_S4D82
default "CY8C6244AZI_S4D83" if SOC_CY8C6244AZI_S4D83
default "CY8C6244AZI_S4D62" if SOC_CY8C6244AZI_S4D62
default "CY8C6244LQI_S4D62" if SOC_CY8C6244LQI_S4D62
default "CY8C6244AZI_S4D12" if SOC_CY8C6244AZI_S4D12
default "CY8C6244LQI_S4D12" if SOC_CY8C6244LQI_S4D12
default "CY8C6144AZI_S4F92" if SOC_CY8C6144AZI_S4F92
default "CY8C6144LQI_S4F92" if SOC_CY8C6144LQI_S4F92
default "CY8C6144AZI_S4F93" if SOC_CY8C6144AZI_S4F93
default "CY8C6144AZI_S4F82" if SOC_CY8C6144AZI_S4F82
default "CY8C6144LQI_S4F82" if SOC_CY8C6144LQI_S4F82
default "CY8C6144AZI_S4F83" if SOC_CY8C6144AZI_S4F83
default "CY8C6144AZI_S4F62" if SOC_CY8C6144AZI_S4F62
default "CY8C6144LQI_S4F62" if SOC_CY8C6144LQI_S4F62
default "CY8C6144AZI_S4F12" if SOC_CY8C6144AZI_S4F12
default "CY8C6144LQI_S4F12" if SOC_CY8C6144LQI_S4F12
endif # SOC_DIE_PSOC6_04

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soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.series
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Cypress PSoC™ 6 MCU lines
config SOC_SERIES_PSOC_60
bool "Infineon PSoC™ 60 series MCU(Value Line)"
select SOC_FAMILY_INFINEON_CAT1
help
Enable support for Infineon PSoC™ 60 MCU series
config SOC_SERIES_PSOC_61
bool "Infineon PSoC™ 61 series MCU (Programmable Line)"
select SOC_FAMILY_INFINEON_CAT1
help
Enable support for Infineon PSoC™ 61 MCU series
config SOC_SERIES_PSOC_62
bool "Infineon PSoC™ 62 series MCU (Performance Line)"
select SOC_FAMILY_INFINEON_CAT1
help
Enable support for Infineon PSoC™ 62 MCU series
config SOC_SERIES_PSOC_63
bool "Infineon PSoC™ 63 series MCU (Connectivity Line)"
select SOC_FAMILY_INFINEON_CAT1
help
Enable support for Infineon PSoC™ 63 MCU series
config SOC_SERIES_PSOC_64
bool "Infineon PSoC™ 64 series MCU (Security Line)"
select SOC_FAMILY_INFINEON_CAT1
help
Enable support for Infineon PSoC™ 64 MCU series

117
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.soc
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# Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6 die
config SOC_DIE_PSOC6
bool
select ARM
select CPU_CORTEX_M4
select CPU_HAS_ARM_MPU
select SOC_FAMILY_INFINEON_CAT1A
select DYNAMIC_INTERRUPTS
select CPU_HAS_FPU
# Infineon PSoC6_01 die
config SOC_DIE_PSOC6_01
bool
select SOC_DIE_PSOC6
# Infineon PSoC6_02 die
config SOC_DIE_PSOC6_02
bool
select SOC_DIE_PSOC6
# Infineon PSoC6_03 die
config SOC_DIE_PSOC6_03
bool
select SOC_DIE_PSOC6
# Infineon PSoC6_04 die
config SOC_DIE_PSOC6_04
bool
select SOC_DIE_PSOC6
# Infineon soc packages
config SOC_PACKAGE_PSOC6_01_124_BGA
bool
config SOC_PACKAGE_PSOC6_01_116_BGA_BLE
bool
config SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE
bool
config SOC_PACKAGE_PSOC6_01_80_WLCSP
bool
config SOC_PACKAGE_PSOC6_01_116_BGA_USB
bool
config SOC_PACKAGE_PSOC6_01_124_BGA_SIP
bool
config SOC_PACKAGE_PSOC6_01_43_SMT
bool
config SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE_USB
bool
config SOC_PACKAGE_PSOC6_01_68_QFN_BLE
bool
config SOC_PACKAGE_PSOC6_02_124_BGA
bool
config SOC_PACKAGE_PSOC6_02_128_TQFP
bool
config SOC_PACKAGE_PSOC6_02_100_WLCSP
bool
config SOC_PACKAGE_PSOC6_02_68_QFN
bool
config SOC_PACKAGE_PSOC6_03_100_TQFP
bool
config SOC_PACKAGE_PSOC6_03_68_QFN
bool
config SOC_PACKAGE_PSOC6_03_49_WLCSP
bool
config SOC_PACKAGE_PSOC6_04_64_TQFP
bool
config SOC_PACKAGE_PSOC6_04_68_QFN
bool
config SOC_PACKAGE_PSOC6_04_80_TQFP
bool
## Infineon MCUs
choice
prompt "MPN"
osource "soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.soc.psoc6_*"
endchoice
if SOC_FAMILY_INFINEON_CAT1A
## PSoC™ 6 Cortex M0+ prebuilt images
choice
prompt "PSoC™ 6 Cortex M0+ prebuilt images"
help
Choose the prebuilt application image to be executed on the Cortex-M0+ core of the PSoC™ 6
dual-core MCU. The image is responsible for booting the Cortex-M4 on the device.
config SOC_PSOC6_CM0P_IMAGE_SLEEP
bool "DeepSleep"
help
DeepSleep prebuilt application image is executed on the Cortex-M0+ core of the PSoC™ 6 BLE
dual-core MCU.The image is provided as C array ready to be compiled as part of the Cortex-M4
application. The Cortex-M0+ application code is placed to internal flash by the Cortex-M4
linker script.
endchoice
endif # SOC_FAMILY_INFINEON_CAT1A

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soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.soc.psoc6_01
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# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_01 series MCUs
config SOC_CY8C6036BZI_F04
bool "CY8C6036BZI_F04"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_60
config SOC_CY8C6016BZI_F04
bool "CY8C6016BZI_F04"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_60
config SOC_CY8C6116BZI_F54
bool "CY8C6116BZI_F54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6136BZI_F14
bool "CY8C6136BZI_F14"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6136BZI_F34
bool "CY8C6136BZI_F34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6137BZI_F14
bool "CY8C6137BZI_F14"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6137BZI_F34
bool "CY8C6137BZI_F34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6137BZI_F54
bool "CY8C6137BZI_F54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6117BZI_F34
bool "CY8C6117BZI_F34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6246BZI_D04
bool "CY8C6246BZI_D04"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6247BZI_D44
bool "CY8C6247BZI_D44"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6247BZI_D34
bool "CY8C6247BZI_D34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6247BZI_D54
bool "CY8C6247BZI_D54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6336BZI_BLF03
bool "CY8C6336BZI_BLF03"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6316BZI_BLF03
bool "CY8C6316BZI_BLF03"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6316BZI_BLF53
bool "CY8C6316BZI_BLF53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6336BZI_BLD13
bool "CY8C6336BZI_BLD13"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD43
bool "CY8C6347BZI_BLD43"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD33
bool "CY8C6347BZI_BLD33"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD53
bool "CY8C6347BZI_BLD53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BLD13
bool "CY8C6347FMI_BLD13"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BLD43
bool "CY8C6347FMI_BLD43"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BLD33
bool "CY8C6347FMI_BLD33"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BLD53
bool "CY8C6347FMI_BLD53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6137FDI_F02
bool "CY8C6137FDI_F02"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6117FDI_F02
bool "CY8C6117FDI_F02"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6247FDI_D02
bool "CY8C6247FDI_D02"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6247FDI_D32
bool "CY8C6247FDI_D32"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6336BZI_BUD13
bool "CY8C6336BZI_BUD13"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BUD43
bool "CY8C6347BZI_BUD43"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BUD33
bool "CY8C6347BZI_BUD33"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BUD53
bool "CY8C6347BZI_BUD53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6337BZI_BLF13
bool "CY8C6337BZI_BLF13"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6136FDI_F42
bool "CY8C6136FDI_F42"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6247FDI_D52
bool "CY8C6247FDI_D52"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6136FTI_F42
bool "CY8C6136FTI_F42"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6247FTI_D52
bool "CY8C6247FTI_D52"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_80_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6247BZI_AUD54
bool "CY8C6247BZI_AUD54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6336BZI_BLF04
bool "CY8C6336BZI_BLF04"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6316BZI_BLF04
bool "CY8C6316BZI_BLF04"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6316BZI_BLF54
bool "CY8C6316BZI_BLF54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6336BZI_BLD14
bool "CY8C6336BZI_BLD14"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD44
bool "CY8C6347BZI_BLD44"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD34
bool "CY8C6347BZI_BLD34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347BZI_BLD54
bool "CY8C6347BZI_BLD54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6247BFI_D54
bool "CY8C6247BFI_D54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CYBLE_416045_02
bool "CYBLE_416045_02"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BUD53
bool "CY8C6347FMI_BUD53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BUD13
bool "CY8C6347FMI_BUD13"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BUD43
bool "CY8C6347FMI_BUD43"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347FMI_BUD33
bool "CY8C6347FMI_BUD33"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_104_M_CSP_BLE_USB
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6137WI_F54
bool "CY8C6137WI_F54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6117WI_F34
bool "CY8C6117WI_F34"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6247WI_D54
bool "CY8C6247WI_D54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6336LQI_BLF02
bool "CY8C6336LQI_BLF02"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_68_QFN_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6336LQI_BLF42
bool "CY8C6336LQI_BLF42"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_68_QFN_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CY8C6347LQI_BLD52
bool "CY8C6347LQI_BLD52"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_68_QFN_BLE
depends on SOC_SERIES_PSOC_63
config SOC_CYB06447BZI_BLD54
bool "CYB06447BZI_BLD54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA_SIP
depends on SOC_SERIES_PSOC_64
config SOC_CYB06447BZI_BLD53
bool "CYB06447BZI_BLD53"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_116_BGA_BLE
depends on SOC_SERIES_PSOC_64
config SOC_CYB06447BZI_D54
bool "CYB06447BZI_D54"
select SOC_DIE_PSOC6_01
select SOC_PACKAGE_PSOC6_01_124_BGA
depends on SOC_SERIES_PSOC_64

197
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.soc.psoc6_02
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@@ -1,197 +0,0 @@
# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_02 series MCUs
config SOC_CYB0644ABZI_S2D44
bool "CYB0644ABZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_64
config SOC_CYS0644ABZI_S2D44
bool "CYS0644ABZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_64
config SOC_CY8C624ABZI_S2D44A0
bool "CY8C624ABZI_S2D44A0"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624ABZI_S2D44
bool "CY8C624ABZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624AAZI_S2D44
bool "CY8C624AAZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624AFNI_S2D43
bool "CY8C624AFNI_S2D43"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_100_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624ABZI_S2D04
bool "CY8C624ABZI_S2D04"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624ABZI_S2D14
bool "CY8C624ABZI_S2D14"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624AAZI_S2D14
bool "CY8C624AAZI_S2D14"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248AZI_S2D14
bool "CY8C6248AZI_S2D14"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248BZI_S2D44
bool "CY8C6248BZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248AZI_S2D44
bool "CY8C6248AZI_S2D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248FNI_S2D43
bool "CY8C6248FNI_S2D43"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_100_WLCSP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C614ABZI_S2F04
bool "CY8C614ABZI_S2F04"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614AAZI_S2F04
bool "CY8C614AAZI_S2F04"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614AFNI_S2F03
bool "CY8C614AFNI_S2F03"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_100_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614AAZI_S2F14
bool "CY8C614AAZI_S2F14"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614ABZI_S2F44
bool "CY8C614ABZI_S2F44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614AAZI_S2F44
bool "CY8C614AAZI_S2F44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614AFNI_S2F43
bool "CY8C614AFNI_S2F43"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_100_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6148BZI_S2F44
bool "CY8C6148BZI_S2F44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6148AZI_S2F44
bool "CY8C6148AZI_S2F44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_128_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6148FNI_S2F43
bool "CY8C6148FNI_S2F43"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_100_WLCSP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C624ABZI_D44
bool "CY8C624ABZI_D44"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_124_BGA
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624ALQI_S2D42
bool "CY8C624ALQI_S2D42"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C624ALQI_S2D02
bool "CY8C624ALQI_S2D02"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248LQI_S2D42
bool "CY8C6248LQI_S2D42"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6248LQI_S2D02
bool "CY8C6248LQI_S2D02"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C614ALQI_S2F42
bool "CY8C614ALQI_S2F42"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C614ALQI_S2F02
bool "CY8C614ALQI_S2F02"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6148LQI_S2F42
bool "CY8C6148LQI_S2F42"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6148LQI_S2F02
bool "CY8C6148LQI_S2F02"
select SOC_DIE_PSOC6_02
select SOC_PACKAGE_PSOC6_02_68_QFN
depends on SOC_SERIES_PSOC_61

125
soc/soc_legacy/arm/infineon_cat1/psoc6/Kconfig.soc.psoc6_04
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@@ -1,125 +0,0 @@
# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
# an affiliate of Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
# Infineon PSoC6_04 series MCUs
config SOC_CY8C6244AZI_S4D92
bool "CY8C6244AZI_S4D92"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244LQI_S4D92
bool "CY8C6244LQI_S4D92"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244AZI_S4D93
bool "CY8C6244AZI_S4D93"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_80_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244AZI_S4D82
bool "CY8C6244AZI_S4D82"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244LQI_S4D82
bool "CY8C6244LQI_S4D82"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244AZI_S4D83
bool "CY8C6244AZI_S4D83"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_80_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244AZI_S4D62
bool "CY8C6244AZI_S4D62"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244LQI_S4D62
bool "CY8C6244LQI_S4D62"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244AZI_S4D12
bool "CY8C6244AZI_S4D12"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6244LQI_S4D12
bool "CY8C6244LQI_S4D12"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_62
config SOC_CY8C6144AZI_S4F92
bool "CY8C6144AZI_S4F92"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144LQI_S4F92
bool "CY8C6144LQI_S4F92"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144AZI_S4F93
bool "CY8C6144AZI_S4F93"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_80_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144AZI_S4F82
bool "CY8C6144AZI_S4F82"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144LQI_S4F82
bool "CY8C6144LQI_S4F82"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144AZI_S4F83
bool "CY8C6144AZI_S4F83"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_80_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144AZI_S4F62
bool "CY8C6144AZI_S4F62"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144LQI_S4F62
bool "CY8C6144LQI_S4F62"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144AZI_S4F12
bool "CY8C6144AZI_S4F12"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_64_TQFP
depends on SOC_SERIES_PSOC_61
config SOC_CY8C6144LQI_S4F12
bool "CY8C6144LQI_S4F12"
select SOC_DIE_PSOC6_04
select SOC_PACKAGE_PSOC6_04_68_QFN
depends on SOC_SERIES_PSOC_61