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soc: quicklogic_eos_s3: Port to HWMv2

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Ports the quicklogic_eos_s3 SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2024-01-23 08:41:48 +00:00
parent a73a9e7533
commit b3c04051fc
9 changed files with 9 additions and 4 deletions
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2
soc/arm/quicklogic_eos_s3/CMakeLists.txt → soc/v2/quicklogic/eos_s3/CMakeLists.txt
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@@ -5,4 +5,6 @@ zephyr_sources(
soc.c
)
zephyr_include_directories(.)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

1
soc/arm/quicklogic_eos_s3/Kconfig.soc → soc/v2/quicklogic/eos_s3/Kconfig
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@@ -2,7 +2,6 @@
# SPDX-License-Identifier: Apache-2.0
config SOC_EOS_S3
bool "QuickLogic EOS S3 SoC"
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_SYSTICK

3
soc/arm/quicklogic_eos_s3/Kconfig.defconfig → soc/v2/quicklogic/eos_s3/Kconfig.defconfig
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@@ -3,9 +3,6 @@
if SOC_EOS_S3
config SOC
default "quicklogic_eos_s3"
config NUM_IRQS
default 52

5
soc/arm/quicklogic_eos_s3/Kconfig → soc/v2/quicklogic/eos_s3/Kconfig.soc
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@@ -3,3 +3,8 @@
config SOC_EOS_S3
bool
help
QuickLogic EOS S3 SoC
config SOC
default "quicklogic_eos_s3" if SOC_EOS_S3

0
soc/arm/quicklogic_eos_s3/pinctrl_soc.h → soc/v2/quicklogic/eos_s3/pinctrl_soc.h
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0
soc/arm/quicklogic_eos_s3/soc.c → soc/v2/quicklogic/eos_s3/soc.c
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0
soc/arm/quicklogic_eos_s3/soc.h → soc/v2/quicklogic/eos_s3/soc.h
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2
soc/v2/quicklogic/eos_s3/soc.yml Normal file
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@@ -0,0 +1,2 @@
socs:
- name: quicklogic_eos_s3

0
soc/arm/quicklogic_eos_s3/soc_pinmap.h → soc/v2/quicklogic/eos_s3/soc_pinmap.h
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