hwmv2: port nxp_ls1046ardb board to V2

Port NXP ls1046ardb board to hardware model v2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan
2024-02-24 16:35:32 +08:00
committed by Carles Cufi
parent 33f7b61866
commit bf7899c645
18 changed files with 45 additions and 94 deletions

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@@ -1,8 +0,0 @@
#
# Copyright 2021 NXP
# SPDX-License-Identifier: Apache-2.0
#
config BOARD_NXP_LS1046ARDB
bool "NXP Layerscape ls1046ardb"
depends on SOC_SERIES_LS1046A

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@@ -1,8 +0,0 @@
#
# Copyright 2021 NXP
# SPDX-License-Identifier: Apache-2.0
#
config BOARD
default "nxp_ls1046ardb"
depends on BOARD_NXP_LS1046ARDB

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@@ -1,33 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
# Platform Configuration
CONFIG_SOC_SERIES_LS1046A=y
CONFIG_SOC_LS1046A=y
CONFIG_BOARD_NXP_LS1046ARDB=y
CONFIG_ARM64_VA_BITS_40=y
CONFIG_ARM64_PA_BITS_40=y
# 25 MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
# Zephyr Kernel Configuration
CONFIG_XIP=n
CONFIG_AARCH64_IMAGE_HEADER=y
CONFIG_MAX_THREAD_BYTES=5
CONFIG_MAX_XLAT_TABLES=10
# SMP support
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ARMV8_A_NS=y
# PSCI is supported
CONFIG_PM_CPU_OPS=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

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@@ -1,33 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
# Platform Configuration
CONFIG_SOC_SERIES_LS1046A=y
CONFIG_SOC_LS1046A=y
CONFIG_BOARD_NXP_LS1046ARDB=y
CONFIG_ARM64_VA_BITS_40=y
CONFIG_ARM64_PA_BITS_40=y
# 25 MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
# Zephyr Kernel Configuration
CONFIG_XIP=n
CONFIG_AARCH64_IMAGE_HEADER=y
CONFIG_MAX_THREAD_BYTES=5
CONFIG_MAX_XLAT_TABLES=10
# SMP support
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=4
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ARMV8_A_NS=y
# PSCI is supported
CONFIG_PM_CPU_OPS=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

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@@ -0,0 +1,8 @@
#
# Copyright 2021,2024 NXP
# SPDX-License-Identifier: Apache-2.0
#
config BOARD_LS1046ARDB
select SOC_LS1046A
select SOC_PART_NUMBER_LS1046A

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@@ -0,0 +1,9 @@
board:
name: ls1046ardb
vendor: nxp
socs:
- name: ls1046a
variants:
- name: smp
variants:
- name: 4cores

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@@ -67,15 +67,15 @@ Other hardware features have not been enabled yet for this board.
The default configuration can be found in the defconfig file for NON-SMP:
``boards/arm64/nxp_ls1046ardb/nxp_ls1046ardb_defconfig``
:zephyr_file:`boards/nxp/ls1046ardb/ls1046ardb_ls1046a_defconfig`
Or for SMP running on all four CPU Cores:
``boards/arm64/nxp_ls1046ardb/nxp_ls1046ardb_smp_4cores_defconfig``
:zephyr_file:`boards/nxp/ls1046ardb/ls1046ardb_ls1046a_smp_4cores_defconfig`
Or for SMP running on 2 CPU Cores (Core2 and Core3):
``boards/arm64/nxp_ls1046ardb/nxp_ls1046ardb_smp_2cores_defconfig``
:zephyr_file:`boards/nxp/ls1046ardb/ls1046ardb_ls1046a_smp_defconfig`
There are two serial port on the board: uart1 and uart2, Zephyr is using
uart2 as serial console.
@@ -91,7 +91,7 @@ kernel tests on LS1046A RDB board. For example, with the :zephyr:code-sample:`sy
.. zephyr-app-commands::
:zephyr-app: samples/synchronization
:host-os: unix
:board: nxp_ls1046ardb
:board: ls1046ardb
:goals: build
This will build an image with the synchronization sample app.
@@ -123,7 +123,7 @@ It will display the following console output:
.. zephyr-app-commands::
:zephyr-app: samples/synchronization
:host-os: unix
:board: nxp_ls1046ardb_smp_4cores
:board: ls1046ardb/ls1046a/smp/4cores
:goals: build
This will build an image with the synchronization sample app.
@@ -151,7 +151,7 @@ It will display the following console output:
.. zephyr-app-commands::
:zephyr-app: samples/synchronization
:host-os: unix
:board: nxp_ls1046ardb_smp_2cores
:board: ls1046ardb/ls1046a/smp
:goals: build
This will build an image with the synchronization sample app.

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@@ -1,4 +1,4 @@
identifier: nxp_ls1046ardb
identifier: ls1046ardb
name: NXP LS1046ARDB on single CPU Core (NON-SMP)
type: mcu
arch: arm64

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@@ -1,9 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
# Platform Configuration
CONFIG_SOC_SERIES_LS1046A=y
CONFIG_SOC_LS1046A=y
CONFIG_BOARD_NXP_LS1046ARDB=y
CONFIG_ARM64_VA_BITS_40=y
CONFIG_ARM64_PA_BITS_40=y
# 25 MHz system clock

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@@ -1,4 +1,4 @@
identifier: nxp_ls1046ardb_smp_2cores
identifier: ls1046ardb/ls1046a/smp
name: NXP LS1046ARDB SMP on CPU Core2 and Core3
type: mcu
arch: arm64

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@@ -1,4 +1,4 @@
identifier: nxp_ls1046ardb_smp_4cores
identifier: ls1046ardb/ls1046a/smp/4cores
name: NXP LS1046ARDB SMP on four CPU Cores
type: mcu
arch: arm64

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@@ -0,0 +1,4 @@
# SPDX-License-Identifier: Apache-2.0
# SMP support
CONFIG_MP_MAX_NUM_CPUS=4

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@@ -0,0 +1,14 @@
# SPDX-License-Identifier: Apache-2.0
# Zephyr Kernel Configuration
CONFIG_MAX_THREAD_BYTES=5
CONFIG_MAX_XLAT_TABLES=10
# SMP support
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ARMV8_A_NS=y
# PSCI is supported
CONFIG_PM_CPU_OPS=y