boards: riscv: tlsr9518adk80d: Convert to v2
Converts the board to hwmv2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
committed by
Carles Cufi
parent
c579770e1d
commit
bf7d3efe78
10
boards/telink/index.rst
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10
boards/telink/index.rst
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.. _boards-telink:
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Telink Semiconductor
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####################
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.. toctree::
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:maxdepth: 1
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:glob:
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**/*
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@@ -3,9 +3,6 @@
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if BOARD_TLSR9518ADK80D
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config BOARD
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default "tlsr9518adk80d"
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config SOC_FLASH_TELINK_B91
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default y if FLASH
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@@ -2,5 +2,4 @@
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_TLSR9518ADK80D
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bool "Telink B91 Platform"
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depends on SOC_TELINK_TLSR9518
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select SOC_TLSR9518
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5
boards/telink/tlsr9518adk80d/board.yml
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boards/telink/tlsr9518adk80d/board.yml
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board:
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name: tlsr9518adk80d
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vendor: telink
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socs:
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- name: tlsr9518
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Before Width: | Height: | Size: 28 KiB After Width: | Height: | Size: 28 KiB |
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Before Width: | Height: | Size: 43 KiB After Width: | Height: | Size: 43 KiB |
@@ -102,7 +102,7 @@ System Clock
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The TLSR9518ADK80D board is configured to use the 24 MHz external crystal oscillator
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with the on-chip PLL/DIV generating the 48 MHz system clock.
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The following values also could be assigned to the system clock in the board DTS file
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(``boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts``):
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`zephyr_file:`boards/telink/tlsr9518adk80d/tlsr9518adk80d.dts`:
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- 16000000
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- 24000000
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@@ -127,7 +127,7 @@ currently enabled (PORT_B for LEDs control and PORT_C for buttons) in the board
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- Key Matrix SW0: PC2_PC3, SW1: PC2_PC1, SW2: PC0_PC3, SW3: PC0_PC1
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Peripheral's pins on the SoC are mapped to the following GPIO pins in the
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``boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts`` file:
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:zephyr_file:`boards/telink/tlsr9518adk80d/tlsr9518adk80d.dts` file:
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- UART0 TX: PB2, RX: PB3
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- UART1 TX: PC6, RX: PC7
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@@ -162,7 +162,7 @@ Here is an example for the "hello_world" application.
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west build -b tlsr9518adk80d samples/hello_world
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To use `Telink RISC-V Linux Toolchain`_, ``ZEPHYR_TOOLCHAIN_VARIANT`` and ``CROSS_COMPILE`` variables need to be set.
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In addition ``CONFIG_FPU=y`` must be selected in ``boards/riscv/tlsr9518adk80d/tlsr9518adk80d_defconfig`` file since this
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In addition ``CONFIG_FPU=y`` must be selected in :zephyr_file:`boards/telink/tlsr9518adk80d/tlsr9518adk80d_defconfig` file since this
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toolchain is compatible only with the float point unit usage.
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.. code-block:: console
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@@ -1,9 +1,6 @@
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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_TELINK_TLSR951X=y
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CONFIG_SOC_TELINK_TLSR9518=y
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CONFIG_BOARD_TLSR9518ADK80D=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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CONFIG_HEAP_MEM_POOL_SIZE=4096
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