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boards: adafruit: correct gpio pin numbers for feathers

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These DTS uses absolute GPIO numbers for some
pins where relative pin numbers are required.
This causes crash on booth when these pins
are enabled. Follow on PR to #101857.

Signed-off-by: Peter Hoddie <peter@moddable.com>
This commit is contained in:
Peter Hoddie
2026-01-16 17:52:43 -08:00
committed by Fabio Baltieri
parent 2d6aa47398
commit ec3c28db0f
8 changed files with 41 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
boards/adafruit/feather_esp32s2/adafruit_feather_esp32s2_tft.dts
View File

@@ -27,7 +27,7 @@
led1: led_1 {
label = "TFT Backlight";
gpios = <&gpio1 45 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
@@ -46,8 +46,8 @@
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
spi-dev = <&spi2>;
dc-gpios = <&gpio1 39 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 40 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
write-only;
#address-cells = <1>;
#size-cells = <0>;

6
boards/adafruit/feather_esp32s2/adafruit_feather_esp32s2_tft_reverse.dts
View File

@@ -28,7 +28,7 @@
led1: led_1 {
label = "TFT Backlight";
gpios = <&gpio1 45 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
@@ -60,8 +60,8 @@
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
spi-dev = <&spi2>;
dc-gpios = <&gpio1 40 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 41 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
write-only;
#address-cells = <1>;
#size-cells = <0>;

16
boards/adafruit/feather_esp32s2/feather_connector.dtsi
View File

@@ -18,14 +18,14 @@
<3 0 &gpio0 15 0>, /* A3 */
<4 0 &gpio0 14 0>, /* A4 */
<5 0 &gpio0 8 0>, /* A5 */
<6 0 &gpio1 36 0>, /* SCK */
<7 0 &gpio1 35 0>, /* MOSI */
<8 0 &gpio1 37 0>, /* MISO */
<9 0 &gpio1 38 0>, /* RX */
<10 0 &gpio1 39 0>, /* TX */
<11 0 &gpio1 43 0>, /* DB */
<12 0 &gpio1 3 0>, /* SDA */
<13 0 &gpio1 4 0>, /* SCL */
<6 0 &gpio1 4 0>, /* SCK */
<7 0 &gpio1 3 0>, /* MOSI */
<8 0 &gpio1 5 0>, /* MISO */
<9 0 &gpio1 6 0>, /* RX */
<10 0 &gpio1 7 0>, /* TX */
<11 0 &gpio1 11 0>, /* DB */
<12 0 &gpio0 3 0>, /* SDA */
<13 0 &gpio0 4 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */
<15 0 &gpio0 6 0>, /* D6 */
<16 0 &gpio0 9 0>, /* D9 */

12
boards/adafruit/feather_esp32s2/feather_connector_tft.dtsi
View File

@@ -18,14 +18,14 @@
<3 0 &gpio0 15 0>, /* A3 */
<4 0 &gpio0 14 0>, /* A4 */
<5 0 &gpio0 8 0>, /* A5 */
<6 0 &gpio1 36 0>, /* SCK */
<7 0 &gpio1 35 0>, /* MOSI */
<8 0 &gpio1 37 0>, /* MISO */
<6 0 &gpio1 4 0>, /* SCK */
<7 0 &gpio1 3 0>, /* MOSI */
<8 0 &gpio1 5 0>, /* MISO */
<9 0 &gpio0 2 0>, /* RX */
<10 0 &gpio0 1 0>, /* TX */
<11 0 &gpio1 43 0>, /* DB */
<12 0 &gpio1 42 0>, /* SDA */
<13 0 &gpio1 41 0>, /* SCL */
<11 0 &gpio1 11 0>, /* DB */
<12 0 &gpio1 10 0>, /* SDA */
<13 0 &gpio1 9 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */
<15 0 &gpio0 6 0>, /* D6 */
<16 0 &gpio0 9 0>, /* D9 */

12
boards/adafruit/feather_esp32s3/feather_connector.dtsi
View File

@@ -17,12 +17,12 @@
<3 0 &gpio0 15 0>, /* A3 */
<4 0 &gpio0 14 0>, /* A4 */
<5 0 &gpio0 8 0>, /* A5 */
<6 0 &gpio1 36 0>, /* SCK */
<7 0 &gpio1 35 0>, /* MOSI */
<8 0 &gpio1 37 0>, /* MISO */
<9 0 &gpio1 38 0>, /* RX */
<10 0 &gpio1 39 0>, /* TX */
<11 0 &gpio1 44 0>, /* DB */
<6 0 &gpio1 4 0>, /* SCK */
<7 0 &gpio1 3 0>, /* MOSI */
<8 0 &gpio1 5 0>, /* MISO */
<9 0 &gpio1 6 0>, /* RX */
<10 0 &gpio1 7 0>, /* TX */
<11 0 &gpio1 12 0>, /* DB */
<12 0 &gpio0 3 0>, /* SDA */
<13 0 &gpio0 4 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */

12
boards/adafruit/feather_esp32s3_tft/feather_connector.dtsi
View File

@@ -17,14 +17,14 @@
<3 0 &gpio0 15 0>, /* A3 */
<4 0 &gpio0 14 0>, /* A4 */
<5 0 &gpio0 8 0>, /* A5 */
<6 0 &gpio1 36 0>, /* SCK */
<7 0 &gpio1 35 0>, /* MOSI */
<8 0 &gpio1 37 0>, /* MISO */
<6 0 &gpio1 4 0>, /* SCK */
<7 0 &gpio1 3 0>, /* MOSI */
<8 0 &gpio1 5 0>, /* MISO */
<9 0 &gpio0 2 0>, /* RX */
<10 0 &gpio0 1 0>, /* TX */
<11 0 &gpio1 44 0>, /* DB */
<12 0 &gpio1 42 0>, /* SDA */
<13 0 &gpio1 41 0>, /* SCL */
<11 0 &gpio1 12 0>, /* DB */
<12 0 &gpio1 10 0>, /* SDA */
<13 0 &gpio1 9 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */
<15 0 &gpio0 6 0>, /* D6 */
<16 0 &gpio0 9 0>, /* D9 */

6
boards/adafruit/feather_esp32s3_tft_reverse/adafruit_feather_esp32s3_tft_reverse_procpu.dts
View File

@@ -75,7 +75,7 @@
led1: led_1 {
label = "TFT Backlight";
gpios = <&gpio1 45 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
@@ -103,8 +103,8 @@
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
spi-dev = <&spi2>;
dc-gpios = <&gpio1 40 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 41 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
write-only;
#address-cells = <1>;
#size-cells = <0>;

12
boards/adafruit/feather_esp32s3_tft_reverse/feather_connector.dtsi
View File

@@ -18,12 +18,12 @@
<3 0 &gpio0 15 0>, /* A3 */
<4 0 &gpio0 14 0>, /* A4 */
<5 0 &gpio0 8 0>, /* A5 */
<6 0 &gpio1 36 0>, /* SCK */
<7 0 &gpio1 35 0>, /* MOSI */
<8 0 &gpio1 37 0>, /* MISO */
<9 0 &gpio1 38 0>, /* RX */
<10 0 &gpio1 39 0>, /* TX */
<11 0 &gpio1 46 0>, /* DB */
<6 0 &gpio1 4 0>, /* SCK */
<7 0 &gpio1 3 0>, /* MOSI */
<8 0 &gpio1 5 0>, /* MISO */
<9 0 &gpio1 6 0>, /* RX */
<10 0 &gpio1 7 0>, /* TX */
<11 0 &gpio1 14 0>, /* DB */
<12 0 &gpio0 3 0>, /* SDA */
<13 0 &gpio0 4 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */