MAINTAINERS: update RISC-V arch area paths

This commit updates the paths assigned to the RISC-V area of maintenance to
include targets based on the SiFive Freedom SoC family.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>

MAINTAINERS.yml

@@ -2859,10 +2859,14 @@ RISCV arch:
     - npitre
   files:
     - arch/riscv/
-    - boards/riscv/
+    - boards/qemu/qemu_riscv*/
+    - boards/sifive/
+    - boards/sparkfun/sparkfun_red_v_things_plus/
     - dts/bindings/riscv/
     - dts/riscv/
     - include/zephyr/arch/riscv/
+    - soc/common/riscv-privileged/
+    - soc/sifive/
     - soc/riscv/
     - tests/arch/riscv/
     - doc/hardware/arch/risc-v.rst