e179f48a8c
Add LMEM cache driver implementing instruction cache ops. Wire driver into cache Kconfig menu and CMake build. Enables I-cache control on SoCs with NXP LMEM controller. Signed-off-by: Holt Sun <holt.sun@nxp.com>
63 lines
992 B
C
63 lines
992 B
C
/*
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* Copyright 2025 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/cache.h>
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#include <zephyr/logging/log.h>
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#include <fsl_cache.h>
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void cache_instr_enable(void)
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{
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L1CACHE_EnableCodeCache();
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}
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void cache_instr_disable(void)
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{
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L1CACHE_DisableCodeCache();
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}
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int cache_instr_flush_all(void)
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{
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L1CACHE_CleanCodeCache();
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return 0;
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}
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int cache_instr_invd_all(void)
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{
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L1CACHE_InvalidateCodeCache();
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return 0;
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}
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int cache_instr_flush_and_invd_all(void)
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{
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L1CACHE_CleanInvalidateCodeCache();
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return 0;
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}
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int cache_instr_flush_range(void *addr, size_t size)
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{
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L1CACHE_CleanCodeCacheByRange((uint32_t)addr, (uint32_t)size);
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return 0;
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}
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int cache_instr_invd_range(void *addr, size_t size)
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{
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L1CACHE_InvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size);
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return 0;
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}
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int cache_instr_flush_and_invd_range(void *addr, size_t size)
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{
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L1CACHE_CleanInvalidateCodeCacheByRange((uint32_t)addr, (uint32_t)size);
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return 0;
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}
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