1c5d236248
1. For the situation when the RAM space is limited and the driver's frame buffer cannot be place in RAM, add a new property 'ext-ram' in the binding, so if in device tree this property is assigned to a secondary RAM space, place the frame buffer there. The old way is to define the frame bufeer address in Kconfig, which may cause inconvenience if other data also needs to be placed in the same RAM space. 2. Update the driver to support new requirement on RT700. The IP requires a 64-byte alignment for the frame buffer stride. 3. Update the calculation of frame buffer size. If the pixel format is updated, the frame buffer size shall be updated too. Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
38 lines
1.1 KiB
Plaintext
38 lines
1.1 KiB
Plaintext
# Copyright 2023,2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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menuconfig DISPLAY_MCUX_DCNANO_LCDIF
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bool "MCUX DCNano LCDIF driver"
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default y
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depends on DT_HAS_NXP_DCNANO_LCDIF_ENABLED
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help
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Enable support for mcux DCNano LCDIF driver.
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if DISPLAY_MCUX_DCNANO_LCDIF
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config MCUX_DCNANO_LCDIF_FB_NUM
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int "Framebuffers to allocate in driver"
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default 1
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range 0 2
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help
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Number of framebuffers to allocate in DCNANO driver. Driver allocated
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framebuffers are required to support partial display updates.
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The driver has been validated to support 0 through 2 framebuffers.
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Note that hardware will likely perform best if zero driver
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framebuffers are allocated by the driver, and the application
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implements double framebuffering by always calling display_write with
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a buffer equal in size to the connected panel.
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config MCUX_DCNANO_LCDIF_MAINTAIN_CACHE
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bool "Maintain cache coherency"
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default y
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help
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Maintain cache coherency for LCDIF framebuffer. This is generally
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required, unless an external framebuffer is utilized with custom
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caching settings, or caching is disabled.
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endif # DISPLAY_MCUX_DCNANO_LCDIF
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