33e71b448b
Update EDMA device tree nodes for NXP MCXE31B platforms to align with the unified EDMA driver implementation. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
80 lines
2.5 KiB
Plaintext
80 lines
2.5 KiB
Plaintext
# DMA configuration options
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# Copyright (c) 2020, NXP
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# SPDX-License-Identifier: Apache-2.0
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EDMA_COMPAT := $(DT_COMPAT_NXP_MCUX_EDMA)
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REV_PROP := nxp,version
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DMAMUX_PROP:= has-dmamux
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config DMA_MCUX_EDMA
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bool "MCUX DMA driver"
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default y
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depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),2)
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imply NOCACHE_MEMORY if CPU_HAS_DCACHE
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help
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DMA version 2 driver for MCUX series SoCs with EDMA IP.
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config DMA_MCUX_EDMA_V3
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bool "MCUX DMA v3 driver"
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default y
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depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),3)
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help
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DMA version 3 driver for MCUX series SoCs with DMA3 IP.
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config DMA_MCUX_EDMA_V4
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bool "MCUX DMA UNIFIED driver"
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default y
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depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),4) || \
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$(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),5)
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help
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DMA version 4 driver for MCUX Series SoCs Equipped
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with Multiple EDMA IPs(EDMA, DMA3, EDMA4, EDMA5).
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For the EDMA4 driver, it is compatible with different EDMA IPs
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and allows different EDMA IPs to be used within a single project.
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However, it required provide additional support in the SDK
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device header. Therefore, only new SoCs could use it.
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config DMA_MCUX_EDMA_DMAMUX
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bool
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default (DMA_MCUX_EDMA || $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(DMAMUX_PROP),True))
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help
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Automatically enabled when EDMA device tree node has has-dmamux property.
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config DMA_MCUX_MAX_DATA_SIZE
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int
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default 64 if DMA_MCUX_EDMA_V4 || DMA_MCUX_EDMA_V3
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default 32
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if DMA_MCUX_EDMA || DMA_MCUX_EDMA_V3 || DMA_MCUX_EDMA_V4
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config DMA_TCD_QUEUE_SIZE
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int "number of TCD in a queue for SG mode"
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default 2
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help
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number of TCD in a queue for SG mode
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config DMA_MCUX_TEST_SLOT_START
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int "test slot start num"
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depends on (SOC_SERIES_KINETIS_K6X || SOC_SERIES_KINETIS_KE1XF \
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|| SOC_SERIES_S32K3 || SOC_SERIES_S32ZE || SOC_SERIES_KE1XZ || SOC_SERIES_MCXE24X \
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|| SOC_SERIES_MCXE31X)
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default 58 if SOC_SERIES_KINETIS_K6X
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default 60 if SOC_SERIES_KINETIS_KE1XF
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default 60 if SOC_SERIES_KE1XZ
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default 62 if SOC_SERIES_S32K3 || SOC_SERIES_S32ZE || SOC_SERIES_MCXE24X || SOC_SERIES_MCXE31X
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help
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test slot start num
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ZEPHYR_DTCM := zephyr,dtcm
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config DMA_MCUX_USE_DTCM_FOR_DMA_DESCRIPTORS
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bool "Use DTCM for DMA descriptors"
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default y
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depends on $(dt_chosen_enabled,$(ZEPHYR_DTCM))
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help
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When this option is activated, the descriptors for DMA transfer are
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located in the DTCM (Data Tightly Coupled Memory).
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endif # DMA_MCUX_EDMA || DMA_MCUX_EDMA_V3 || DMA_MCUX_EDMA_V4
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