70ebb0a6a3
Introduce the stm32u3 serie to the the existing flash driver It is based on the stm32l5 model. Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
265 lines
6.6 KiB
C
265 lines
6.6 KiB
C
/*
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* Copyright (c) 2021 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define LOG_DOMAIN flash_stm32u3
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#define LOG_LEVEL CONFIG_FLASH_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(LOG_DOMAIN);
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#include <soc.h>
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#include <stm32_ll_icache.h>
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#include <stm32_ll_system.h>
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#include <string.h>
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#include <zephyr/cache.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/flash.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include "flash_stm32.h"
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#define BANK2_OFFSET (KB(CONFIG_FLASH_SIZE) / 2)
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/* Macro to check if the flash is Dual bank or not */
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#define stm32_flash_has_2_banks(flash_device) \
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((FLASH_STM32_REGS(flash_device)->OPTR & FLASH_STM32_DBANK) == FLASH_STM32_DBANK)
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/*
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* offset and len must be aligned on write-block-size for write,
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* positive and not beyond end of flash
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*/
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bool flash_stm32_valid_range(const struct device *dev, off_t offset,
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uint32_t len,
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bool write)
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{
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if (write && !flash_stm32_valid_write(offset, len)) {
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return false;
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}
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return flash_stm32_range_exists(dev, offset, len);
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}
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static int write_nwords(const struct device *dev, off_t offset, const uint32_t *buff, size_t n)
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{
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FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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volatile uint32_t *flash = (uint32_t *)(offset
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+ FLASH_STM32_BASE_ADDRESS);
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bool full_zero = true;
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uint32_t tmp;
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int rc;
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int i;
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/* if the non-secure control register is locked,do not fail silently */
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if (regs->CR & FLASH_STM32_NSLOCK) {
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LOG_ERR("NSCR locked");
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return -EIO;
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}
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/* Check that no Flash main memory operation is ongoing */
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rc = flash_stm32_wait_flash_idle(dev);
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if (rc < 0) {
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return rc;
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}
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/* Check if this double/quad word is erased and value isn't 0.
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*
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* It is allowed to write only zeros over an already written dword / qword
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* See 6.3.7 in STM32L5 reference manual.
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* See 7.3.7 in STM32U5 reference manual.
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* See 7.3.5 in STM32H5 reference manual.
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*/
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for (i = 0; i < n; i++) {
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if (buff[i] != 0) {
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full_zero = false;
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break;
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}
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}
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if (!full_zero) {
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for (i = 0; i < n; i++) {
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if (flash[i] != 0xFFFFFFFFUL) {
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LOG_ERR("Word at offs %ld not erased", (long)(offset + i));
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return -EIO;
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}
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}
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}
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/* Set the NSPG bit */
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regs->CR |= FLASH_STM32_NSPG;
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/* Flush the register write */
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tmp = regs->CR;
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/* Perform the data write operation at the desired memory address */
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for (i = 0; i < n; i++) {
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flash[i] = buff[i];
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}
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/* Wait until the NSBSY bit is cleared */
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rc = flash_stm32_wait_flash_idle(dev);
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/* Clear the NSPG bit */
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regs->CR &= ~FLASH_STM32_NSPG;
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return rc;
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}
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static int erase_page(const struct device *dev, unsigned int offset)
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{
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FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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uint32_t tmp;
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int rc;
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int page;
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/* if the non-secure control register is locked,do not fail silently */
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if (regs->CR & FLASH_STM32_NSLOCK) {
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LOG_ERR("NSCR locked");
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return -EIO;
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}
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/* Check that no Flash memory operation is ongoing */
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rc = flash_stm32_wait_flash_idle(dev);
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if (rc < 0) {
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return rc;
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}
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if (stm32_flash_has_2_banks(dev)) {
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bool bank_swap;
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/* Check whether bank1/2 are swapped */
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bank_swap = ((regs->OPTR & FLASH_OPTR_SWAP_BANK) == FLASH_OPTR_SWAP_BANK);
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if ((offset < (FLASH_SIZE / 2)) && !bank_swap) {
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/* The pages to be erased is in bank 1 */
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regs->CR &= ~FLASH_STM32_NSBKER_MSK;
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page = offset / FLASH_PAGE_SIZE;
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LOG_DBG("Erase page %d on bank 1", page);
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} else if ((offset >= BANK2_OFFSET) && bank_swap) {
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/* The pages to be erased is in bank 1 */
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regs->CR &= ~FLASH_STM32_NSBKER_MSK;
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page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE;
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LOG_DBG("Erase page %d on bank 1", page);
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} else if ((offset < (FLASH_SIZE / 2)) && bank_swap) {
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/* The pages to be erased is in bank 2 */
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regs->CR |= FLASH_STM32_NSBKER;
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page = offset / FLASH_PAGE_SIZE;
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LOG_DBG("Erase page %d on bank 2", page);
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} else if ((offset >= BANK2_OFFSET) && !bank_swap) {
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/* The pages to be erased is in bank 2 */
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regs->CR |= FLASH_STM32_NSBKER;
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page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE;
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LOG_DBG("Erase page %d on bank 2", page);
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} else {
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LOG_ERR("Offset %d does not exist", offset);
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return -EINVAL;
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}
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} else {
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page = offset / FLASH_PAGE_SIZE_128_BITS;
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LOG_DBG("Erase page %d", page);
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}
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/* Set the NSPER bit and select the page you wish to erase */
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regs->CR |= FLASH_STM32_NSPER;
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regs->CR &= ~FLASH_STM32_NSPNB_MSK;
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regs->CR |= page << FLASH_STM32_NSPNB_POS;
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/* Set the NSSTRT bit */
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regs->CR |= FLASH_STM32_NSSTRT;
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/* flush the register write */
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tmp = regs->CR;
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/* Wait for the NSBSY bit */
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rc = flash_stm32_wait_flash_idle(dev);
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if (stm32_flash_has_2_banks(dev)) {
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regs->CR &= ~(FLASH_STM32_NSPER | FLASH_STM32_NSBKER);
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} else {
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regs->CR &= ~(FLASH_STM32_NSPER);
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}
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return rc;
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}
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int flash_stm32_block_erase_loop(const struct device *dev,
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unsigned int offset,
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unsigned int len)
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{
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unsigned int address = offset;
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int rc = 0;
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/* Disable icache, this will start the invalidation procedure.
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* All changes(erase/write) to flash memory should happen when
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* i-cache is disabled. A write to flash performed without
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* disabling i-cache will set ERRF error flag in SR register.
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*/
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bool cache_enabled = LL_ICACHE_IsEnabled();
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sys_cache_instr_disable();
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for (address = offset; address <= offset + len - 1; address += FLASH_PAGE_SIZE) {
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rc = erase_page(dev, address);
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if (rc < 0) {
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break;
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}
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}
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if (cache_enabled) {
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sys_cache_instr_enable();
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}
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return rc;
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}
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int flash_stm32_write_range(const struct device *dev, unsigned int offset,
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const void *data, unsigned int len)
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{
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int i, rc = 0;
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/* Disable icache, this will start the invalidation procedure.
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* All changes(erase/write) to flash memory should happen when
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* i-cache is disabled. A write to flash performed without
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* disabling i-cache will set ERRF error flag in SR register.
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*/
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bool cache_enabled = LL_ICACHE_IsEnabled();
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sys_cache_instr_disable();
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for (i = 0; i < len; i += FLASH_STM32_WRITE_BLOCK_SIZE) {
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rc = write_nwords(dev, offset + i, ((const uint32_t *)data + (i >> 2)),
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FLASH_STM32_WRITE_BLOCK_SIZE / 4);
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if (rc < 0) {
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break;
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}
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}
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if (cache_enabled) {
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sys_cache_instr_enable();
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}
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return rc;
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}
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void flash_stm32_page_layout(const struct device *dev,
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const struct flash_pages_layout **layout,
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size_t *layout_size)
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{
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static struct flash_pages_layout stm32_flash_layout[1];
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if (stm32_flash_layout[0].pages_count == 0) {
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if (stm32_flash_has_2_banks(dev)) {
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stm32_flash_layout[0].pages_count = FLASH_PAGE_NB * 2;
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} else {
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stm32_flash_layout[0].pages_count = FLASH_PAGE_NB;
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}
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stm32_flash_layout[0].pages_size = FLASH_PAGE_SIZE;
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}
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*layout = stm32_flash_layout;
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*layout_size = 1;
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}
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