80a54a89cd
The RP2350 uses the Xh3irq interrupt controller, which supports nested and prioritised interrupts. This adds initial support, configuring the controller in 'direct' (non-vectored) mode. Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
54 lines
1.1 KiB
C
54 lines
1.1 KiB
C
/*
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* Copyright (c) 2025 Andrew Featherstone
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT hazard3_hazard3_intc
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/irq.h>
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#include <zephyr/device.h>
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#include <zephyr/types.h>
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#include <zephyr/arch/riscv/csr.h>
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#include <zephyr/arch/riscv/irq.h>
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#include <pico/runtime_init.h>
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#include <hardware/irq.h>
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#define CSR_WINDOW_SIZE 16
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void arch_irq_enable(unsigned int irq)
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{
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irq_set_enabled(irq, true);
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}
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void arch_irq_disable(unsigned int irq)
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{
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irq_set_enabled(irq, false);
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}
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int arch_irq_is_enabled(unsigned int irq)
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{
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return pico_irq_is_enabled(irq);
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}
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static int hazard3_irq_init(const struct device *dev)
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{
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/* Clear all IRQ force array bits. */
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for (int i = 0; (i * CSR_WINDOW_SIZE) < CONFIG_NUM_IRQS; i++) {
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hazard3_irqarray_clear(RVCSR_MEIFA_OFFSET, i, -1);
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}
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/* Global external IRQ enable. */
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csr_write(mie, RVCSR_MIE_MEIE_BITS);
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csr_set(mstatus, MSTATUS_IEN);
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return 0;
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}
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DEVICE_DT_INST_DEFINE(0, hazard3_irq_init, NULL, NULL, NULL,
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PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL);
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