2537ee030a
Added a condition to check trigger type as high-level detection is not supported by Renesas RZ external interrupt. Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
260 lines
11 KiB
C
260 lines
11 KiB
C
/*
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* Copyright (c) 2024-2025 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_rz_ext_irq
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/irq.h>
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#include <zephyr/logging/log.h>
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#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED
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#include "r_intc_irq.h"
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#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED
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#include "r_icu.h"
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#endif
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#if CONFIG_RENESAS_RZ_INTC_HAS_NMI
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#include "r_intc_nmi.h"
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#endif
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#include <zephyr/drivers/interrupt_controller/intc_rz_ext_irq.h>
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#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
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LOG_MODULE_REGISTER(rz_ext_irq, CONFIG_INTC_LOG_LEVEL);
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struct intc_rz_ext_irq_config {
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const struct pinctrl_dev_config *pin_config;
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const external_irq_cfg_t *fsp_cfg;
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const external_irq_api_t *fsp_api;
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};
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struct intc_rz_ext_irq_data {
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external_irq_ctrl_t *fsp_ctrl;
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intc_rz_ext_irq_callback_t callback;
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void *callback_data;
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};
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/* FSP interruption handlers. */
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#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED
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void r_intc_irq_isr(void *irq);
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void r_intc_nmi_isr(void *irq);
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#define INTC_IRQ_ISR r_intc_irq_isr
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#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED
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void r_icu_isr(void *irq);
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#define INTC_IRQ_ISR r_icu_isr
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#endif
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int intc_rz_ext_irq_enable(const struct device *dev)
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{
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const struct intc_rz_ext_irq_config *config = dev->config;
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struct intc_rz_ext_irq_data *data = dev->data;
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fsp_err_t err = FSP_SUCCESS;
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err = config->fsp_api->enable(data->fsp_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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return 0;
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}
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int intc_rz_ext_irq_disable(const struct device *dev)
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{
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const struct intc_rz_ext_irq_config *config = dev->config;
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struct intc_rz_ext_irq_data *data = dev->data;
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fsp_err_t err = FSP_SUCCESS;
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err = config->fsp_api->disable(data->fsp_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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return 0;
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}
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int intc_rz_ext_irq_set_callback(const struct device *dev, intc_rz_ext_irq_callback_t cb, void *arg)
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{
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struct intc_rz_ext_irq_data *data = dev->data;
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data->callback = cb;
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data->callback_data = arg;
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return 0;
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}
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int intc_rz_ext_irq_set_type(const struct device *dev, uint8_t trig)
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{
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const struct intc_rz_ext_irq_config *config = dev->config;
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struct intc_rz_ext_irq_data *data = dev->data;
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fsp_err_t err = FSP_SUCCESS;
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external_irq_cfg_t *p_cfg = (external_irq_cfg_t *)config->fsp_cfg;
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/* High level detection is not supported by HW */
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if (trig == EXTERNAL_IRQ_TRIG_LEVEL_HIGH) {
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return -ENOTSUP;
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}
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p_cfg->trigger = (external_irq_trigger_t)trig;
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err = config->fsp_api->close(data->fsp_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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err = config->fsp_api->open(data->fsp_ctrl, config->fsp_cfg);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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return 0;
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}
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static int intc_rz_ext_irq_init(const struct device *dev)
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{
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const struct intc_rz_ext_irq_config *config = dev->config;
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struct intc_rz_ext_irq_data *data = dev->data;
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fsp_err_t err = FSP_SUCCESS;
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int ret = 0;
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if (config->pin_config) {
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ret = pinctrl_apply_state(config->pin_config, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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LOG_ERR("%s: pinctrl config failed.", __func__);
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return ret;
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}
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}
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err = config->fsp_api->open(data->fsp_ctrl, config->fsp_cfg);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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return 0;
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}
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static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args)
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{
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const struct device *dev = (const struct device *)args->p_context;
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struct intc_rz_ext_irq_data *data = dev->data;
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if (data->callback) {
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data->callback(data->callback_data);
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}
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}
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static void intc_rz_ext_irq_isr_handle(const struct device *dev)
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{
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const struct intc_rz_ext_irq_config *config = dev->config;
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INTC_IRQ_ISR((void *)config->fsp_cfg->irq);
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}
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#ifdef CONFIG_CPU_CORTEX_M
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#define GET_IRQ_FLAGS(index) 0
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#else /* Cortex-A/R */
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#define GET_IRQ_FLAGS(index) DT_INST_IRQ_BY_IDX(index, 0, flags)
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#endif
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#define EXT_IRQ_RZ_IRQ_CONNECT(index, isr) \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(index, 0, irq), DT_INST_IRQ_BY_IDX(index, 0, priority), \
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isr, DEVICE_DT_INST_GET(index), GET_IRQ_FLAGS(index))
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#define INTC_RZ_EXT_IRQ_INIT(index) \
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static external_irq_cfg_t g_external_irq##index##_cfg = { \
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.trigger = DT_INST_ENUM_IDX_OR(index, trigger_type, 0), \
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.filter_enable = true, \
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.clock_source_div = EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1, \
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.p_callback = intc_rz_ext_irq_callback, \
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.p_context = DEVICE_DT_INST_GET(index), \
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.p_extend = NULL, \
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.ipl = DT_INST_IRQ_BY_IDX(index, 0, priority), \
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.irq = DT_INST_IRQ_BY_IDX(index, 0, irq), \
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COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \
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.channel = 0), ( \
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.channel = (DT_INST_REG_ADDR(index)))), \
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}; \
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\
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PINCTRL_DT_INST_DEFINE(index); \
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\
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struct intc_rz_ext_irq_config intc_rz_ext_irq_config##index = { \
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.pin_config = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.fsp_cfg = (external_irq_cfg_t *)&g_external_irq##index##_cfg, \
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COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \
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.fsp_api = &g_external_irq_on_intc_nmi), ( \
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.fsp_api = &g_external_irq_on_intc_irq)), \
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}; \
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\
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COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), \
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(static intc_nmi_instance_ctrl_t g_external_irq##index##_ctrl;), \
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(static intc_irq_instance_ctrl_t g_external_irq##index##_ctrl;)) \
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\
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static struct intc_rz_ext_irq_data intc_rz_ext_irq_data##index = { \
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.fsp_ctrl = (external_irq_ctrl_t *)&g_external_irq##index##_ctrl, \
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}; \
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\
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static int intc_rz_ext_irq_init_##index(const struct device *dev) \
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{ \
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COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \
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EXT_IRQ_RZ_IRQ_CONNECT(index, r_intc_nmi_isr);), ( \
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EXT_IRQ_RZ_IRQ_CONNECT(index, intc_rz_ext_irq_isr_handle);)) \
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return intc_rz_ext_irq_init(dev); \
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}; \
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\
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DEVICE_DT_INST_DEFINE(index, intc_rz_ext_irq_init_##index, NULL, \
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&intc_rz_ext_irq_data##index, &intc_rz_ext_irq_config##index, \
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PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL);
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#define INTC_RZ_ICU_EXT_IRQ_INIT(index) \
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static external_irq_cfg_t g_external_irq##index##_cfg = { \
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.trigger = DT_INST_ENUM_IDX_OR(index, trigger_type, 0), \
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.filter_enable = true, \
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.clock_source_div = EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1, \
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.p_callback = intc_rz_ext_irq_callback, \
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.p_context = DEVICE_DT_INST_GET(index), \
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.p_extend = NULL, \
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.ipl = DT_INST_IRQ_BY_IDX(index, 0, priority), \
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.irq = DT_INST_IRQ_BY_IDX(index, 0, irq), \
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.channel = DT_INST_REG_ADDR(index), \
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}; \
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\
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PINCTRL_DT_INST_DEFINE(index); \
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\
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struct intc_rz_ext_irq_config intc_rz_ext_irq_config##index = { \
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.pin_config = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.fsp_cfg = (external_irq_cfg_t *)&g_external_irq##index##_cfg, \
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.fsp_api = &g_external_irq_on_icu, \
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}; \
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\
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icu_instance_ctrl_t g_external_irq##index##_ctrl; \
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\
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static struct intc_rz_ext_irq_data intc_rz_ext_irq_data##index = { \
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.fsp_ctrl = (icu_instance_ctrl_t *)&g_external_irq##index##_ctrl, \
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}; \
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\
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static int intc_rz_ext_irq_init_##index(const struct device *dev) \
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{ \
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EXT_IRQ_RZ_IRQ_CONNECT(index, intc_rz_ext_irq_isr_handle); \
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return intc_rz_ext_irq_init(dev); \
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}; \
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\
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DEVICE_DT_INST_DEFINE(index, intc_rz_ext_irq_init_##index, NULL, \
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&intc_rz_ext_irq_data##index, &intc_rz_ext_irq_config##index, \
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PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL);
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#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED
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DT_INST_FOREACH_STATUS_OKAY(INTC_RZ_EXT_IRQ_INIT)
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#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED
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DT_INST_FOREACH_STATUS_OKAY(INTC_RZ_ICU_EXT_IRQ_INIT)
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#endif
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