Yasushi SHOJI 31863b30ae soc: xlnx: versal: Select VFPv3-D16 ...

The Versal RPU uses Arm Cortex-R5F cores, which implement VFPv3-D16
(single and double precision with 16 double-word registers):.

Select VFP_DP_D16 to describe the available VFP configuration for this SoC.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>

2026-01-19 10:09:44 +01:00

..

versal

soc: xlnx: versal: Select VFPv3-D16

2026-01-19 10:09:44 +01:00

versal2

soc: amd: Add support for AMD Versal Gen 2 RPU

2025-05-19 13:32:09 +02:00

versalnet

soc: amd: Add initial support for Versal Net SoC APU (Cortex-A78)

2025-09-05 16:48:38 -04:00

zynq7000

soc: xlnx: zynq7000: move SoC code to common folder

2025-10-30 18:39:16 -04:00

zynqmp

soc: xlnx: zynqmp: fix vectors and SRAM MPU region priority order

2025-11-02 12:32:32 -05:00