1dc9a8aa17
Ports the SoC configuration to hardware model version 2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
18 lines
576 B
C
18 lines
576 B
C
/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef SL_DEVICE_INIT_HFXO_CONFIG_H
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#define SL_DEVICE_INIT_HFXO_CONFIG_H
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#include <zephyr/devicetree.h>
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#define SL_DEVICE_INIT_HFXO_MODE cmuHfxoOscMode_Crystal
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#define SL_DEVICE_INIT_HFXO_FREQ DT_PROP(DT_NODELABEL(clk_hfxo), clock_frequency)
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#define SL_DEVICE_INIT_HFXO_CTUNE DT_PROP(DT_NODELABEL(clk_hfxo), ctune)
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#define SL_DEVICE_INIT_HFXO_PRECISION DT_PROP(DT_NODELABEL(clk_hfxo), precision)
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#endif /* SL_DEVICE_INIT_HFXO_CONFIG_H */
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