24669df207
use CONFIG_RISCV_ISA_EXT_F to set CONFIG_CPU_HAS_FPU. Same for CONFIG_RISCV_ISA_EXT_D and CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
38 lines
846 B
Plaintext
38 lines
846 B
Plaintext
# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_TLSR951X
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bool
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select RISCV
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select RISCV_ISA_RV32I
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_A
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select RISCV_ISA_EXT_C
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select RISCV_ISA_EXT_F
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZIFENCEI
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select RISCV_PRIVILEGED
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select RISCV_HAS_PLIC
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select RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING
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select HAS_TELINK_DRIVERS
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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select CPU_HAS_ANDES_HWDSP
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select CPU_HAS_ANDES_PFT
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select RISCV_SOC_CONTEXT_SAVE if RISCV_CUSTOM_CSR_ANDES_HWDSP
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select RISCV_SOC_CONTEXT_SAVE if RISCV_CUSTOM_CSR_ANDES_PFT
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imply XIP
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select SOC_EARLY_INIT_HOOK
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if SOC_SERIES_TLSR951X
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config TELINK_B91_HWDSP
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bool
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select DEPRECATED
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config TELINK_B91_PFT_ARCH
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bool
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select DEPRECATED
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endif # SOC_SERIES_TLSR951X
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