2d4feea8ce
The STM32 CCM can be used as `/chosen/zephyr,dtcm` - transition all boards to this chosen to allow deprecation/removal of the legacy `zephyr,ccm`. Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
279 lines
5.9 KiB
Plaintext
279 lines
5.9 KiB
Plaintext
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/f4/stm32f469Xi.dtsi>
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#include <st/f4/stm32f469nihx-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "STMicroelectronics STM32F469I-DISCO board";
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compatible = "st,stm32f469i-disco";
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chosen {
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zephyr,console = &usart3;
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zephyr,shell-uart = &usart3;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,dtcm = &ccm0;
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zephyr,display = <dc;
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zephyr,touch = &ft5336;
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};
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sdram1: sdram@c0000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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device_type = "memory";
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reg = <0xc0000000 DT_SIZE_M(16)>;
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zephyr,memory-region = "SDRAM1";
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};
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leds {
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compatible = "gpio-leds";
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green_led_1: led_1 {
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gpios = <&gpiog 6 GPIO_ACTIVE_HIGH>;
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label = "User LD1";
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};
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orange_led_2: led_2 {
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gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>;
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label = "User LD2";
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};
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red_led_3: led_3 {
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gpios = <&gpiod 5 GPIO_ACTIVE_HIGH>;
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label = "User LD3";
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};
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blue_led_4: led_4 {
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gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
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label = "User LD4";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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label = "User";
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gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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aliases {
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led0 = &green_led_1;
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led1 = &orange_led_2;
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led2 = &red_led_3;
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led3 = &blue_led_4;
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sw0 = &user_button;
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};
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};
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&clk_lsi {
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status = "okay";
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(8)>;
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status = "okay";
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};
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&pll {
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div-m = <8>;
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mul-n = <336>;
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div-p = <2>;
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div-q = <7>;
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div-r = <6>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&pllsai {
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div-m = <8>;
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mul-n = <266>;
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div-p = <2>;
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div-r = <5>;
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div-divr = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(168)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <4>;
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apb2-prescaler = <2>;
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};
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&usart3 {
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pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&usart6 {
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pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
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pinctrl-names = "default";
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status = "okay";
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ft5336: ft5336@2a {
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compatible = "focaltech,ft5336";
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reg = <0x2a>;
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int-gpios = <&gpioj 5 0>;
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status = "okay";
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inverted-y;
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screen-width = <800>;
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screen-height = <480>;
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};
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};
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&spi2 {
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pinctrl-0 = <&spi2_sck_pd3 &spi2_miso_pb14 &spi2_mosi_pb15>;
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pinctrl-names = "default";
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cs-gpios = <&gpioh 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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status = "okay";
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};
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zephyr_udc0: &usbotg_fs {
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pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rtc {
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clocks = <&rcc STM32_CLOCK(APB1, 28)>,
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<&rcc STM32_SRC_LSI RTC_SEL(2)>;
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status = "okay";
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};
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&sdmmc1 {
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clocks = <&rcc STM32_CLOCK(APB2, 11)>,
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<&rcc STM32_SRC_PLL_Q CLK48M_SEL(0)>;
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status = "okay";
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pinctrl-0 = <&sdio_d0_pc8
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&sdio_d1_pc9
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&sdio_d2_pc10
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&sdio_d3_pc11
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&sdio_ck_pc12
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&sdio_cmd_pd2>;
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pinctrl-names = "default";
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cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
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disk-name = "SD";
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};
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&fmc {
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pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4 &fmc_nbl3_pi5
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&fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke0_ph2
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&fmc_sdne0_ph3 &fmc_sdnras_pf11 &fmc_sdncas_pg15
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&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
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&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
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&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1 &fmc_a12_pg2
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&fmc_a14_pg4 &fmc_a15_pg5
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&fmc_d0_pd14 &fmc_d1_pd15
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&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
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&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
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&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
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&fmc_d15_pd10 &fmc_d16_ph8 &fmc_d17_ph9 &fmc_d18_ph10
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&fmc_d19_ph11 &fmc_d20_ph12 &fmc_d21_ph13 &fmc_d22_ph14
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&fmc_d23_ph15 &fmc_d24_pi0 &fmc_d25_pi1 &fmc_d26_pi2
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&fmc_d27_pi3 &fmc_d28_pi6 &fmc_d29_pi7 &fmc_d30_pi9
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&fmc_d31_pi10>;
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pinctrl-names = "default";
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status = "okay";
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sdram {
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compatible = "st,stm32-fmc-sdram";
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power-up-delay = <100>;
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num-auto-refresh = <8>;
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mode-register = <0x230>;
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/*
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* Auto refresh command shall be issued every 15.625 us
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* and is calculated as ((15.625 * SDRAM_CLK_MHZ) - 20)
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* Note: SDRAM_CLK_MHZ = HCLK_MHZ / 2
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*/
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refresh-rate = <1292>;
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status = "okay";
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bank@0 {
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reg = <0>;
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st,sdram-control = <STM32_FMC_SDRAM_NC_8
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STM32_FMC_SDRAM_NR_12
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STM32_FMC_SDRAM_MWID_32
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STM32_FMC_SDRAM_NB_4
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STM32_FMC_SDRAM_CAS_3
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STM32_FMC_SDRAM_SDCLK_PERIOD_2
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STM32_FMC_SDRAM_RBURST_ENABLE
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STM32_FMC_SDRAM_RPIPE_0>;
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st,sdram-timing = <2 6 4 6 2 2 2>;
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};
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};
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};
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&mipi_dsi {
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/* DSI HOST dedicated PLL
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* F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
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* PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
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* = 8 MHz / 2 * 2 * 125 / 2 / (1<<0) / 8 = 62.5 MHz
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*/
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pll-ndiv = <125>;
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pll-idf = <2>;
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pll-odf = <0>;
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vs-active-high;
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hs-active-high;
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de-active-high;
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status = "okay";
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otm8009a: otm8009a@0 {
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compatible = "orisetech,otm8009a";
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reg = <0x0>;
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height = <800>;
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width = <480>;
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reset-gpios = <&gpioh 7 0>;
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bl-gpios = <&gpioa 3 0>;
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data-lanes = <2>;
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pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
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rotation = <90>;
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status = "okay";
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};
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};
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<dc {
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width = <800>;
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height = <480>;
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pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
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ext-sdram = <&sdram1>;
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def-back-color-red = <0>;
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def-back-color-green = <0>;
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def-back-color-blue = <0>;
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status = "okay";
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/* orisetech, otm8009a */
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display-timings {
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compatible = "zephyr,panel-timing";
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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hsync-len = <2>;
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vsync-len = <1>;
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hback-porch = <34>;
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vback-porch = <15>;
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hfront-porch = <34>;
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vfront-porch = <16>;
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};
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};
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