e3a55c96ef
With commitd280d89the gpiof port got moved from file stm32u5.dtsi to file stm32u5_extra.dtsi. stm32u5_extra.dtsi is not included for STM32U535/545. In same file stm32u5.dtsi still node wkup-pin@8 references non-existent port gpiof. Fixes #93445 Signed-off-by: Andreas Schmidt <andreas.schmidt@dormakaba.com> (cherry picked from commit528ab9d9c2)
88 lines
2.0 KiB
Plaintext
88 lines
2.0 KiB
Plaintext
/*
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* Copyright (c) 2025 Harris Tomy
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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usart2: serial@40004400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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clocks = <&rcc STM32_CLOCK(APB1, 17)>;
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resets = <&rctl STM32_RESET(APB1L, 17)>;
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interrupts = <62 0>;
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status = "disabled";
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};
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gpiof: gpio@42021400 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x42021400 0x400>;
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clocks = <&rcc STM32_CLOCK(AHB2, 5)>;
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};
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gpioi: gpio@42022000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x42022000 0x400>;
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clocks = <&rcc STM32_CLOCK(AHB2, 8)>;
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};
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sdmmc2: sdmmc@420c8c00 {
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compatible = "st,stm32-sdmmc";
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reg = <0x420c8c00 0x400>;
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clocks = <&rcc STM32_CLOCK(AHB2, 28)>,
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<&rcc STM32_SRC_HSI48 SDMMC_SEL(0)>;
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resets = <&rctl STM32_RESET(AHB2L, 28)>;
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interrupts = <79 0>;
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status = "disabled";
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};
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fmc: memory-controller@420d0400 {
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compatible = "st,stm32-fmc";
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reg = <0x420d0400 0x400>;
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clocks = <&rcc STM32_CLOCK(AHB2_2, 0)>;
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status = "disabled";
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sram {
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compatible = "st,stm32-fmc-nor-psram";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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octospi2: spi@420d2400 {
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compatible = "st,stm32-ospi";
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reg = <0x420d2400 0x400>, <0x70000000 DT_SIZE_M(256)>;
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interrupts = <120 0>;
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clock-names = "ospix", "ospi-ker", "ospi-mgr";
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clocks = <&rcc STM32_CLOCK(AHB2_2, 8)>,
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<&rcc STM32_SRC_SYSCLK OCTOSPI_SEL(0)>,
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<&rcc STM32_CLOCK(AHB2, 21)>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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ucpd1: ucpd@4000dc00 {
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compatible = "st,stm32-ucpd";
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reg = <0x4000dc00 0x400>;
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clocks = <&rcc STM32_CLOCK(APB1, 23)>;
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interrupts = <106 0>;
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status = "disabled";
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};
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};
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};
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&pwr {
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wkup-pin@8 {
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wkup-gpios = <&gpiof 2 STM32_PWR_WKUP_EVT_SRC_0>,
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<&gpioa 7 STM32_PWR_WKUP_EVT_SRC_1>,
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<&gpiob 10 STM32_PWR_WKUP_EVT_SRC_2>;
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};
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};
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