Files
zephyr/soc/st/stm32/stm32n6x/npu/Kconfig
Wolfgang Betz b84bdbcee3 dts: arm: st: n6: Use dedicated dts node for NPU cache (aka CACHEAXI)
The new node is called "npu_cache".

This way a possibility is offered to choose - thru an overlay - if to
enable the NPU cache or not.
This new node has a dependency with node "npu", so the NPU cache's
status is taken into account only in case node "npu" has status "okay".

Default status value of "npu_cache" is "okay"
(i.e. enable the NPU cache).

Signed-off-by: Wolfgang Betz <wolfgang.betz@st.com>
2026-01-23 09:18:34 -06:00

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# STMicroelectronics STM32N6 MCU series
# Copyright (c) 2026 STMicroelectronics
# SPDX-License-Identifier: Apache-2.0
config STM32N6_NPU
bool "Neural-ART accelerator (NPU)"
select RESET
default y
depends on DT_HAS_ST_STM32_NPU_ENABLED
config STM32N6_NPU_INIT_PRIORITY
int "STM32N6 NPU init priority"
default KERNEL_INIT_PRIORITY_DEFAULT
depends on STM32N6_NPU
help
STM32N6 NPU initialization priority.
Note: This value must have a higher priority (i.e., lower numerical value)
than `STM32N6_NPU_CACHE_INIT_PRIORITY`!
config STM32N6_NPU_CACHE_INIT_PRIORITY
int "STM32N6 NPU cache (aka CACHEAXI) init priority"
default APPLICATION_INIT_PRIORITY
depends on STM32N6_NPU
help
STM32N6 NPU cache (aka CACHEAXI) initialization priority.
Note: This value must have a lower priority (i.e., higher numerical value)
than `STM32N6_NPU_INIT_PRIORITY`!