This commit adds support for the SiFive Freedom E310 SoC for the Zephyr Hardware Model v2. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
20 lines
467 B
Plaintext
20 lines
467 B
Plaintext
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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# Copyright (c) 2024 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_SIFIVE_FREEDOM_FE300
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bool
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# RISC-V options
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select RISCV
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select RISCV_PRIVILEGED
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select RISCV_HAS_PLIC
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select RISCV_ISA_RV32I
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_A
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZIFENCEI
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select ATOMIC_OPERATIONS_C
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select INCLUDE_RESET_VECTOR
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