b9e06f4c38
This commit adds support for the SiFive Freedom E310 SoC for the Zephyr Hardware Model v2. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
25 lines
737 B
C
25 lines
737 B
C
/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file SoC configuration macros for the SiFive Freedom processor
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*/
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#ifndef __RISCV_SIFIVE_FREEDOM_FE300_SOC_H_
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#define __RISCV_SIFIVE_FREEDOM_FE300_SOC_H_
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/*
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* On FE310 and FU540, peripherals such as SPI, UART, I2C and PWM are clocked
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* by TLCLK, which is derived from CORECLK.
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*/
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#define SIFIVE_TLCLK_BASE_FREQUENCY \
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DT_PROP_BY_PHANDLE_IDX(DT_NODELABEL(tlclk), clocks, 0, clock_frequency)
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#define SIFIVE_TLCLK_DIVIDER DT_PROP(DT_NODELABEL(tlclk), clock_div)
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#define SIFIVE_PERIPHERAL_CLOCK_FREQUENCY \
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(SIFIVE_TLCLK_BASE_FREQUENCY / SIFIVE_TLCLK_DIVIDER)
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#endif /* __RISCV_SIFIVE_FREEDOM_FE300_SOC_H_ */
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