c01af5a7b8
Ports the ti_k3 SoC configuration to hardware model version 2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
20 lines
466 B
Plaintext
20 lines
466 B
Plaintext
# Copyright (c) 2023 Enphase Energy
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
config SOC_SERIES_AM6X_A53
|
|
select ARM64
|
|
select CPU_CORTEX_A53
|
|
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
|
|
|
|
config SOC_SERIES_AM6X_M4
|
|
select ARM
|
|
select CPU_CORTEX_M4
|
|
select CPU_CORTEX_M_HAS_SYSTICK
|
|
select DYNAMIC_INTERRUPTS
|
|
select CPU_CORTEX_M_HAS_DWT
|
|
select OPENAMP_RSC_TABLE
|
|
select UART_NS16550_ACCESS_WORD_ONLY
|
|
select EXTERNAL_ADDRESS_TRANSLATION
|
|
select MM_DRV
|
|
select MM_TI_RAT
|