dbc5ed79f5
Port STM32C0 series to HW model v2 Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
27 lines
475 B
C
27 lines
475 B
C
/*
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* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file SoC configuration macros for the STM32C0 family processors.
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*
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* Based on reference manual:
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* STM32C0X advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 2.2: Memory organization
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*/
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#ifndef _STM32C0_SOC_H_
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#define _STM32C0_SOC_H_
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#ifndef _ASMLANGUAGE
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#include <stm32c0xx.h>
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32C0_SOC_H_ */
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