regulator: qcom-rpmh-regulator: add support for PM8150 PM8350 PM7325
Add the PM8150, PM8350, and PM7325 regulator data found on Qualcomm platforms. These regulator tables are imported from the Linux driver to enable support for these PMICs in U-Boot. Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
This commit is contained in:
Aswin Murugan
committed by
Casey Connolly
Casey Connolly
parent
bf4045ede8
commit
07e66ed619
@@ -402,6 +402,42 @@ static const struct rpmh_vreg_hw_data pmic5_bob = {
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.n_modes = ARRAY_SIZE(pmic_mode_map_pmic5_bob),
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};
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static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
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.regulator_type = VRM,
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.ops = &rpmh_regulator_vrm_drms_ops,
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.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
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.n_voltages = 216,
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.pmic_mode_map = pmic_mode_map_pmic5_smps,
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.n_modes = ARRAY_SIZE(pmic_mode_map_pmic5_smps),
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};
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static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
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.regulator_type = VRM,
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.ops = &rpmh_regulator_vrm_drms_ops,
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.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
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.n_voltages = 236,
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.pmic_mode_map = pmic_mode_map_pmic5_smps,
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.n_modes = ARRAY_SIZE(pmic_mode_map_pmic5_smps),
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};
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static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
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.regulator_type = VRM,
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.ops = &rpmh_regulator_vrm_drms_ops,
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.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
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.n_voltages = 264,
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.pmic_mode_map = pmic_mode_map_pmic5_smps,
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.n_modes = ARRAY_SIZE(pmic_mode_map_pmic5_smps),
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};
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static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
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.regulator_type = VRM,
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.ops = &rpmh_regulator_vrm_drms_ops,
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.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
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.n_voltages = 264,
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.pmic_mode_map = pmic_mode_map_pmic5_smps,
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.n_modes = ARRAY_SIZE(pmic_mode_map_pmic5_smps),
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};
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static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = {
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.regulator_type = VRM,
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.ops = &rpmh_regulator_vrm_drms_ops,
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@@ -521,7 +557,34 @@ static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
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};
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static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
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RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
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RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
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RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
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RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
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RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
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RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
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RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
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RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
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RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
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RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
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RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
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RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
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RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
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RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
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RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
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RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
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RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
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RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
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RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
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RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
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RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
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RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
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RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
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RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
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RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
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RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
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RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
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RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
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{}
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};
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@@ -626,6 +689,65 @@ static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {
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{}
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};
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static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
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RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
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RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
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RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
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RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
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RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
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RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
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RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
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RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
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RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
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RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
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RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
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RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
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RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
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RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
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RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
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RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
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RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
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RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
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RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
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RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
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RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
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RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
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RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
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RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
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{}
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};
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static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
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RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
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RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
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RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
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RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
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RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
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RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
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RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
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RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
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RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
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RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
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RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
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RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
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RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
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RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
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RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
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RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
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RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
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RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
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RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
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RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
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RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
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RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
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RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
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RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
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RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
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RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
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RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
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{}
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};
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/* probe an individual regulator */
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static int rpmh_regulator_probe(struct udevice *dev)
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{
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@@ -736,6 +858,10 @@ static const struct udevice_id rpmh_regulator_ids[] = {
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.compatible = "qcom,pm6150l-rpmh-regulators",
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.data = (ulong)pm6150l_vreg_data,
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},
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{
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.compatible = "qcom,pm7325-rpmh-regulators",
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.data = (ulong)pm7325_vreg_data,
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},
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{
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.compatible = "qcom,pm8150-rpmh-regulators",
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.data = (ulong)pm8150_vreg_data,
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@@ -744,6 +870,10 @@ static const struct udevice_id rpmh_regulator_ids[] = {
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.compatible = "qcom,pm8150l-rpmh-regulators",
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.data = (ulong)pm8150l_vreg_data,
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},
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{
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.compatible = "qcom,pm8350c-rpmh-regulators",
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.data = (ulong)pm8350c_vreg_data,
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},
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{
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.compatible = "qcom,pm8550-rpmh-regulators",
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.data = (ulong)pm8550_vreg_data,
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